Electrical Specifications
5.10 HOLD and HOLDA Timings
Table 5−16 and Table 5−17 assume testing over recommended operating conditions and H = 0.5t
Figure 5−14).
(see
c(CO)
Table 5−16. HOLD and HOLDA Timing Requirements
MIN
4H+8
7
MAX
UNIT
t
t
Pulse duration, HOLD low duration
ns
ns
w(HOLD)
Setup time, HOLD before CLKOUT low
su(HOLD)
Table 5−17. HOLD and HOLDA Switching Characteristics
PARAMETER
MIN
MAX
3
UNIT
ns
t
t
t
t
t
t
Disable time, Address, PS, DS, IS high impedance from CLKOUT low
Disable time, R/W high impedance from CLKOUT low
Disable time, MSTRB, IOSTRB high impedance from CLKOUT low
Enable time, Address, PS, DS, IS valid from CLKOUT low
Enable time, R/W enabled from CLKOUT low
dis(CLKL-A)
dis(CLKL-RW)
dis(CLKL-S)
en(CLKL-A)
en(CLKL-RW)
en(CLKL-S)
3
ns
3
ns
2H+4
2H+3
2H+3
ns
ns
Enable time, MSTRB, IOSTRB enabled from CLKOUT low
2
ns
− 1
4
4
ns
ns
ns
Valid time, HOLDA low after CLKOUT low
t
t
v(HOLDA)
− 1
Valid time, HOLDA high after CLKOUT low
Pulse duration, HOLDA low duration
2H−3
w(HOLDA)
CLKOUT
t
t
su(HOLD)
su(HOLD)
t
w(HOLD)
HOLD
t
t
v(HOLDA)
v(HOLDA)
t
w(HOLDA)
HOLDA
t
t
en(CLKL−A)
dis(CLKL−A)
A[22:0]
PS, DS, IS
D[15:0]
R/W
t
t
t
t
dis(CLKL−RW)
dis(CLKL−S)
dis(CLKL−S)
en(CLKL−RW)
t
en(CLKL−S)
MSTRB
IOSTRB
t
en(CLKL−S)
Figure 5−14. HOLD and HOLDA Timings (HM = 1)
87
November 2001 − Revised April 2004
SPRS007D
TI [ TEXAS INSTRUMENTS ]
