Electrical Specifications
5.12 Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Timings
Table 5−19 assumes testing over recommended operating conditions and H = 0.5t
(see Figure 5−18).
c(CO)
Table 5−19. Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Switching Characteristics
PARAMETER
Delay time, CLKOUT low to IAQ low
MIN
− 1
MAX
UNIT
ns
t
4
d(CLKL-IAQL)
t
t
Delay time, CLKOUT low to IAQ high
Delay time, IAQ low to address valid
Delay time, CLKOUT low to IACK low
Delay time, CLKOUT low to IACK high
Delay time, IACK low to address valid
Hold time, address valid after IAQ high
Hold time, address valid after IACK high
Pulse duration, IAQ low
− 1
4
2
4
4
2
ns
d(CLKL-IAQH)
d(A)IAQ
ns
t
− 1
− 1
ns
d(CLKL-IACKL)
t
ns
d(CLKL-IACKH)
d(A)IACK
h(A)IAQ
t
t
t
t
t
ns
− 2
− 2
ns
ns
h(A)IACK
w(IAQL)
2H − 2
2H − 2
ns
Pulse duration, IACK low
ns
w(IACKL)
CLKOUT
A[22:0]
t
t
d(CLKL−IAQH)
d(CLKL−IAQL)
t
h(A)IAQ
t
d(A)IAQ
t
w(IAQL)
IAQ
t
t
t
d(CLKL−IACKH)
d(CLKL−IACKL)
h(A)IACK
t
d(A)IACK
t
w(IACKL)
IACK
Figure 5−18. Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Timings
90
SPRS007D
November 2001 − Revised April 2004