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TMS320VC5407 参数 Datasheet PDF下载

TMS320VC5407图片预览
型号: TMS320VC5407
PDF下载: 下载PDF文件 查看货源
内容描述: 定点数字信号处理器 [Fixed-Point Digital Signal Processors]
分类和应用: 数字信号处理器
文件页数/大小: 110 页 / 1351 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号TMS320VC5407的Datasheet PDF文件第61页浏览型号TMS320VC5407的Datasheet PDF文件第62页浏览型号TMS320VC5407的Datasheet PDF文件第63页浏览型号TMS320VC5407的Datasheet PDF文件第64页浏览型号TMS320VC5407的Datasheet PDF文件第66页浏览型号TMS320VC5407的Datasheet PDF文件第67页浏览型号TMS320VC5407的Datasheet PDF文件第68页浏览型号TMS320VC5407的Datasheet PDF文件第69页  
Functional Overview  
Table 326. DMA Subbank Addressed Registers (Continued)  
SUB-  
NAME  
ADDRESS  
DESCRIPTION  
ADDRESS  
DMIDX1  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
56h/57h  
21h  
22h  
23h  
24h  
25h  
26h  
27h  
28h  
29h  
2Ah  
2Bh  
2Ch  
2Dh  
2Eh  
2Fh  
30h  
31h  
32h  
33h  
34h  
35h  
36h  
37h  
38h  
39h  
3Ah  
3Bh  
3Ch  
3Dh  
DMA element index address register 1  
DMFRI0  
DMA frame index register 0  
DMFRI1  
DMA frame index register 1  
DMGSA0  
DMGDA0  
DMGCR0  
DMGFR0  
XSRCDP  
XDSTDP  
DMGSA1  
DMGDA1  
DMGCR1  
DMGFR1  
DMGSA2  
DMGDA2  
DMGCR2  
DMGFR2  
DMGSA3  
DMGDA3  
DMGCR3  
DMGFR3  
DMGSA4  
DMGDA4  
DMGCR4  
DMGFR4  
DMGSA5  
DMGDA5  
DMGCR5  
DMGFR5  
DMA global source address reload register, channel 0  
DMA global destination address reload register, channel 0  
DMA global count reload register, channel 0  
DMA global frame count reload register, channel 0  
DMA extended source data page  
DMA extended destination data page  
DMA global source address reload register, channel 1  
DMA global destination address reload register, channel 1  
DMA global count reload register, channel 1  
DMA global frame count reload register, channel 1  
DMA global source address reload register, channel 2  
DMA global destination address reload register, channel 2  
DMA global count reload register, channel 2  
DMA global frame count reload register, channel 2  
DMA global source address reload register, channel 3  
DMA global destination address reload register, channel 3  
DMA global count reload register, channel 3  
DMA global frame count reload register, channel 3  
DMA global source address reload register, channel 4  
DMA global destination address reload register, channel 4  
DMA global count reload register, channel 4  
DMA global frame count reload register, channel 4  
DMA global source address reload register, channel 5  
DMA global destination address reload register, channel 5  
DMA global count reload register, channel 5  
DMA global frame count reload register, channel 5  
65  
November 2001 Revised April 2004  
SPRS007D  
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