Functional Overview
3.19 Interrupts
Vector-relative locations and priorities for all internal and external interrupts are shown in Table 3−27.
Table 3−27. Interrupt Locations and Priorities
LOCATION
DECIMAL
0
NAME
PRIORITY
FUNCTION
HEX
00
RS, SINTR
NMI, SINT16
SINT17
1
2
Reset (hardware and software reset)
Nonmaskable interrupt
Software interrupt #17
Software interrupt #18
Software interrupt #19
Software interrupt #20
Software interrupt #21
Software interrupt #22
Software interrupt #23
Software interrupt #24
Software interrupt #25
Software interrupt #26
Software interrupt #27
Software interrupt #28
Software interrupt #29
Software interrupt #30
External user interrupt #0
External user interrupt #1
External user interrupt #2
Timer 0 interrupt
4
04
8
08
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3
SINT18
12
0C
10
SINT19
16
SINT20
20
14
SINT21
24
18
SINT22
28
1C
20
SINT23
32
SINT24
36
24
SINT25
40
28
SINT26
44
2C
30
SINT27
48
SINT28
52
34
SINT29
56
38
SINT30
60
3C
40
INT0, SINT0
INT1, SINT1
INT2, SINT2
TINT0, SINT3
64
68
44
4
72
48
5
76
4C
50
6
BRINT0, SINT4
BXINT0, SINT5
BRINT2, SINT6
BXINT2, SINT7
INT3, TINT1, SINT8
HINT, SINT9
80
7
McBSP #0 receive interrupt
McBSP #0 transmit interrupt
84
54
8
†
88
58
9
McBSP #2 receive interrupt (default)
McBSP #2 transmit interrupt (default)
†
92
5C
60
10
11
12
13
14
15
16
—
—
‡
96
External user interrupt #3/Timer 1 interrupt
HPI interrupt
100
104
108
112
116
120
124−127
64
†
BRINT1, SINT10
BXINT1, SINT11
DMAC4,SINT12
DMAC5,SINT13
UART, SINT14
Reserved
68
McBSP #1 receive interrupt (default)
†
6C
70
McBSP #1 transmit interrupt (default)
DMA channel 4
DMA channel 5
UART interrupt
Reserved
74
78
7C−7F
†
‡
See Table 3−13 for other interrupt selections.
The INT3 and TINT1 interrupts are ORed together. To distinguish one from the other, one of these two interrupt sources must be inhibited.
66
SPRS007D
November 2001 − Revised April 2004
TI [ TEXAS INSTRUMENTS ]
