Introduction
2.4
Signal Descriptions
Table 2−2 specifies the signals on the F281x and C281x devices. All digital inputs are TTL-compatible. All
outputs are 3.3 V with CMOS levels. Inputs are not 5-V tolerant. A 100-µA (or 20-µA) pullup/pulldown is used.
†
Table 2−2. Signal Descriptions
PIN NO.
‡
I/O/Z
§
NAME
PU/PD
DESCRIPTION
179-PIN
GHH
176-PIN
PGF
128-PIN
PBK
XINTF SIGNALS (2812 ONLY)
XA[18]
D7
B7
158
156
152
148
144
141
138
132
130
125
121
118
111
108
103
85
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
−
O/Z
O/Z
−
−
−
−
−
−
−
XA[17]
XA[16]
XA[15]
XA[14]
XA[13]
XA[12]
XA[11]
XA[10]
XA[9]
A8
O/Z
B9
O/Z
A10
E10
C11
A14
C12
D14
E12
F12
G14
H13
J12
M11
N10
M2
G5
O/Z
O/Z
O/Z
O/Z
O/Z
−
−
−
−
−
−
−
−
−
−
O/Z
19-bit XINTF Address Bus
XA[8]
O/Z
XA[7]
O/Z
XA[6]
O/Z
XA[5]
O/Z
XA[4]
O/Z
XA[3]
O/Z
XA[2]
80
O/Z
XA[1]
43
O/Z
XA[0]
18
O/Z
XD[15]
XD[14]
XD[13]
XD[12]
XD[11]
XD[10]
XD[9]
XD[8]
XD[7]
XD[6]
XD[5]
XD[4]
XD[3]
XD[2]
XD[1]
XD[0]
A9
147
139
97
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
B11
J10
L14
N9
96
74
L9
73
M8
P7
68
65
16-bit XINTF Data Bus
L5
54
L3
39
J5
36
K3
33
J3
30
H5
27
H3
24
G3
21
†
‡
§
Typical drive strength of the output buffer for all pins is 4 mA except for TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins, which are 8 mA.
I = Input, O = Output, Z = High impedance
PU = pin has internal pullup; PD = pin has internal pulldown. Pullup/pulldown strength is given in Section 6.3.
19
April 2001 − Revised December 2004
SPRS174L