Electrical Specifications
5.12 Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Timings
Table 5–19 assumes testing over recommended operating conditions and H = 0.5t
c(CO)
(see Figure 5–18).
Table 5–19. Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Switching Characteristics
PARAMETER
td(CLKL-IAQL)
td(CLKL-IAQH)
td(A)IAQ
td(CLKL-IACKL)
td(CLKL-IACKH)
td(A)IACK
th(A)IAQ
th(A)IACK
tw(IAQL)
tw(IACKL)
Delay time, CLKOUT low to IAQ low
Delay time, CLKOUT low to IAQ high
Delay time, IAQ low to address valid
Delay time, CLKOUT low to IACK low
Delay time, CLKOUT low to IACK high
Delay time, IACK low to address valid
Hold time, address valid after IAQ high
Hold time, address valid after IACK high
Pulse duration, IAQ low
Pulse duration, IACK low
–2
–2
2H – 2
2H – 2
–1
–1
MIN
–1
–1
MAX
4
4
2
4
4
2
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CLKOUT
A[22:0]
td(CLKL – IAQL)
td(A)IAQ
IAQ
tw(IAQL)
td(CLKL – IAQH)
th(A)IAQ
td(CLKL – IACKL)
td(A)IACK
IACK
tw(IACKL)
td(CLKL – IACKH)
th(A)IACK
Figure 5–18. Instruction Acquisition (IAQ) and Interrupt Acknowledge (IACK) Timings
78
SPRS007B
November 2001 – Revised July 2003