TMS320DM6437
Digital Media Processor
www.ti.com
SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
6.12 Inter-Integrated Circuit (I2C)
The inter-integrated circuit (I2C) module provides an interface between DM6437 and other devices
compliant with Philips Semiconductors Inter-IC bus (I2C-bus™) specification version 2.1. External
components attached to this 2-wire serial bus can transmit/receive up to 8-bit data to/from the DSP
through the I2C module. The I2C port does not support CBUS compatible devices.
The I2C port supports:
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Compatible with Philips I2C Specification Revision 2.1 (January 2000)
Fast Mode up to 400 Kbps (no fail-safe I/O buffers)
Noise Filter to Remove Noise 50 ns or less
Seven- and Ten-Bit Device Addressing Modes
Master (Transmit/Receive) and Slave (Transmit/Receive) Functionality
Events: DMA, Interrupt, or Polling
Slew-Rate Limited Open-Drain Output Buffers
I2C Module
Clock
Prescale
Peripheral Clock
(DSP/18)
ICPSC
Control
Bit Clock
Generator
Own
Address
ICOAR
ICSAR
ICMDR
ICCNT
SCL
Noise
Filter
I2C Clock
Slave
ICCLKH
ICCLKL
Address
Mode
Data
Count
Transmit
ICXSR
Transmit
Shift
Extended
Mode
ICEMDR
Transmit
Buffer
ICDXR
SDA
Interrupt/DMA
ICIMR
Noise
Filter
I2C Data
Interrupt
Receive
ICDRR
Mask/Status
Receive
Buffer
Interrupt
Status
ICSTR
ICIVR
Interrupt
Vector
Receive
Shift
ICRSR
Shading denotes control/status registers.
Figure 6-29. I2C Module Block Diagram
For more detailed information on the I2C peripheral, see Section 2.9, Documentation Support section of
this document for the TMS320DM643x DMP Peripherals Overview Reference Guide (literature number
SPRU983).
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Peripheral Information and Electrical Specifications
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