TMS320DM6437
Digital Media Processor
www.ti.com
SPRS345B–NOVEMBER 2006–REVISED MARCH 2007
6.11 Universal Asynchronous Receiver/Transmitter (UART)
DM6437 has 2 UART peripherals. Each UART has the following features:
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16-byte storage space for both the transmitter and receiver FIFOs
1, 4, 8, or 14 byte selectable receiver FIFO trigger level for autoflow control and DMA
DMA signaling capability for both received and transmitted data
Programmable auto-rts and auto-cts for autoflow control
Frequency pre-scale values from 1 to 65,535 to generate appropriate baud rates
Prioritized interrupts
Programmable serial data formats
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5, 6, 7, or 8-bit characters
Even, odd, or no parity bit generation and detection
1, 1.5, or 2 stop bit generation
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False start bit detection
Line break generation and detection
Internal diagnostic capabilities
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Loopback controls for communications link fault isolation
Break, parity, overrun, and framing error simulation
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Modem control functions (CTS, RTS) on UART0 only.
The UART0/1 registers are listed in Table 6-48 and Table 6-49 .
6.11.1 UART Peripheral Register Description(s)
Table 6-48. UART0 Register Descriptions
HEX ADDRESS RANGE
0x01C2 0000
ACRONYM
REGISTER NAME
RBR
UART0 Receiver Buffer Register (Read Only)
UART0 Transmitter Holding Register (Write Only)
UART0 Interrupt Enable Register
UART0 Interrupt Identification Register (Read Only)
UART0 FIFO Control Register (Write Only)
UART0 Line Control Register
UART0 Modem Control Register
UART0 Line Status Register
0x01C2 0000
THR
0x01C2 0004
IER
0x01C2 0008
IIR
0x01C2 0008
FCR
0x01C2 000C
0x01C2 0010
LCR
MCR
0x01C2 0014
LSR
0x01C2 0018
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Reserved
0x01C2 001C
0x01C2 0020
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Reserved
DLL
UART0 Divisor Latch (LSB)
0x01C2 0024
DLH
UART0 Divisor Latch (MSB)
0x01C2 0028
PID1
Peripheral Identification Register 1
Peripheral Identification Register 2
UART0 Power and Emulation Management Register
Reserved
0x01C2 002C
0x01C2 0030
PID2
PWREMU_MGMT
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0x01C2 0034 - 0x01C2 03FF
Table 6-49. UART1 Register Descriptions
HEX ADDRESS RANGE
0x01C2 0400
ACRONYM
RBR
REGISTER NAME
UART1 Receiver Buffer Register (Read Only)
UART1 Transmitter Holding Register (Write Only)
UART1 Interrupt Enable Register
0x01C2 0400
THR
0x01C2 0404
IER
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Peripheral Information and Electrical Specifications
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