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TMS320C6678XCYP25 参数 Datasheet PDF下载

TMS320C6678XCYP25图片预览
型号: TMS320C6678XCYP25
PDF下载: 下载PDF文件 查看货源
内容描述: 多核固定和浮点数字信号处理器 [Multicore Fixed and Floating-Point Digital Signal Processor]
分类和应用: 数字信号处理器
文件页数/大小: 242 页 / 2088 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320C6678  
Multicore Fixed and Floating-Point Digital Signal Processor  
SPRS691D—April 2013  
www.ti.com  
Table 7-45  
CIC3 Register  
Address Offset  
0x414  
Register Mnemonic  
Register Name  
CH_MAP_REG5  
Interrupt Channel Map Register for 20 to 20+3  
Interrupt Channel Map Register for 24 to 24+3  
Interrupt Channel Map Register for 28 to 28+3  
Interrupt Channel Map Register for 32 to 32+3  
Interrupt Channel Map Register for 36 to 36+3  
Interrupt Channel Map Register for 40 to 40+3  
Interrupt Channel Map Register for 44 to 44+3  
Interrupt Channel Map Register for 48 to 48+3  
Interrupt Channel Map Register for 52 to 52+3  
Interrupt Channel Map Register for 56 to 56+3  
Interrupt Channel Map Register for 60 to 60+3  
Host Interrupt Map Register for 0 to 0+3  
Host Interrupt Map Register for 4 to 4+3  
Host Interrupt Map Register for 8 to 8+3  
Host Interrupt Map Register for 12 to 12+3  
Host Interrupt Map Register for 16 to 16+3  
Host Interrupt Map Register for 20 to 20+3  
Host Interrupt Map Register for 24 to 24+3  
Host Interrupt Map Register for 28 to 28+3  
Host Interrupt Map Register for 32 to 32+3  
Host Interrupt Map Register for 36 to 36+3  
Host Int Enable Register 0  
0x418  
CH_MAP_REG6  
0x41c  
CH_MAP_REG7  
0x420  
CH_MAP_REG8  
0x424  
CH_MAP_REG9  
0x428  
CH_MAP_REG10  
CH_MAP_REG11  
CH_MAP_REG12  
CH_MAP_REG13  
CH_MAP_REG14  
CH_MAP_REG15  
HINT_MAP_REG0  
HINT_MAP_REG1  
HINT_MAP_REG2  
HINT_MAP_REG3  
HINT_MAP_REG4  
HINT_MAP_REG5  
HINT_MAP_REG6  
HINT_MAP_REG7  
HINT_MAP_REG8  
HINT_MAP_REG9  
ENABLE_HINT_REG0  
ENABLE_HINT_REG1  
0x42c  
0x430  
0x434  
0x438  
0x43c  
0x800  
0x804  
0x808  
0x80c  
0x810  
0x814  
0x818  
0x81c  
0x820  
0x824  
0x1500  
0x1504  
End of Table 7-45  
Host Int Enable Register 1  
7.9.3 Inter-Processor Register Map  
Table 7-46  
IPC Generation Registers (IPCGRx) (Part 1 of 2)  
Address Start  
0x02620200  
0x02620204  
0x02620208  
0x0262020C  
0x02620210  
0x02620214  
0x02620218  
0x0262021C  
0x02620220  
0x02620240  
0x02620244  
0x02620248  
0x0262024C  
0x02620250  
0x02620254  
Address End  
0x02620203  
0x02620207  
0x0262020B  
0x0262020F  
0x02620213  
0x02620217  
0x0262021B  
0x0262021F  
0x0262023F  
0x02620243  
0x02620247  
0x0262024B  
0x0262024F  
0x02620253  
0x02620257  
Size  
4B  
4B  
4B  
4B  
4B  
4B  
4B  
4B  
32B  
4B  
4B  
4B  
4B  
4B  
4B  
Register Name  
Description  
NMIGR0  
NMIGR1  
NMIGR2  
NMIGR3  
NMIGR4  
NMIGR5  
NMIGR6  
NMIGR7  
Reserved  
IPCGR0  
IPCGR1  
IPCGR2  
IPCGR3  
IPCGR4  
IPCGR5  
NMI Event Generation Register for CorePac0  
NMI Event Generation Register for CorePac1  
NMI Event Generation Register for CorePac2  
NMI Event Generation Register for CorePac3  
NMI Event Generation Register for CorePac4  
NMI Event Generation Register for CorePac5  
NMI Event Generation Register for CorePac6  
NMI Event Generation Register for CorePac7  
Reserved  
IPC Generation Register for CorePac0  
IPC Generation Register for CorePac1  
IPC Generation Register for CorePac2  
IPC Generation Register for CorePac3  
IPC Generation Register for CorePac4  
IPC Generation Register for CorePac5  
186  
Peripheral Information and Electrical Specifications  
Copyright 2013 Texas Instruments Incorporated  
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