TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
Figure 7-38
SPI Master Mode Timing Diagrams — Base Timings for 3 Pin Mode
1
MASTER MODE
POLARITY = 0 PHASE = 0
2
3
SPIx_CLK
5
4
6
SPIx_SIMO
SPIx_SOMI
MO(0)
7
MO(1)
MO(n-1)
MO(n)
MI(n)
8
MI(0)
MI(1)
MI(n-1)
MASTER MODE
POLARITY = 0 PHASE = 1
4
SPIx_CLK
SPIx_SIMO
SPIx_SOMI
6
5
5
5
MO(0)
7
MO(1)
MI(1)
MO(n-1)
MI(n-1)
MO(n)
MI(n)
8
MI(0)
4
MASTER MODE
POLARITY = 1 PHASE = 0
SPIx_CLK
SPIx_SIMO
SPIx_SOMI
6
MO(0)
7
MO(1)
MI(1)
MO(n-1)
MO(n)
MI(n)
8
MI(0)
MI(n-1)
MASTER MODE
POLARITY = 1 PHASE = 1
SPIx_CLK
SPIx_SIMO
SPIx_SOMI
4
6
MO(0)
7
MO(1)
MI(1)
MO(n-1)
MI(n-1)
MO(n)
MI(n)
8
MI(0)
Figure 7-39
SPI Additional Timings for 4 Pin Master Mode with Chip Select Option
MASTER MODE 4 PIN WITH CHIP SELECT
19
20
SPIx_CLK
SPIx_SIMO
SPIx_SOMI
SPIx_SCS
MO(0)
MO(n)
MI(n)
MO(n-1)
MI(n-1)
MO(1)
MI(1)
MI(0)
Copyright 2012 Texas Instruments Incorporated
Peripheral Information and Electrical Specifications 199
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