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TMS320C6672ACYP25 参数 Datasheet PDF下载

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型号: TMS320C6672ACYP25
PDF下载: 下载PDF文件 查看货源
内容描述: 多核固定和浮点数字信号处理器 [Multicore Fixed and Floating-Point Digital Signal Processor]
分类和应用: 数字信号处理器
文件页数/大小: 228 页 / 2410 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320C6672  
Multicore Fixed and Floating-Point Digital Signal Processor  
SPRS708C—February 2012  
www.ti.com  
Table 7-39  
CIC0 Event Inputs (Secondary Interrupts for C66x CorePacs) (Part 4 of 4)  
Input Event# on CIC  
System Interrupt  
INTDST14  
Description  
126  
127  
128  
129  
130  
131  
132  
133  
134  
135  
136  
137  
138  
139  
140  
141  
RapidIO interrupt  
RapidIO interrupt  
EMIF16 error interrupt  
INTDST15  
EASYNCERR  
Reserved  
Reserved  
Reserved  
Reserved  
QM_INT_PKTDMA_0  
QM_INT_PKTDMA_1  
RapidIO_INT_PKTDMA_0  
PASS_INT_PKTDMA_0  
SmartReflex_intrreq0  
SmartReflex_intrreq1  
SmartReflex_intrreq2  
SmartReflex_intrreq3  
VPNoSMPSAck  
Queue manager Interrupt for packet DMA starvation  
Queue manager Interrupt for packet DMA starvation  
RapidIO Interrupt for packet DMA starvation  
Network coprocessor Interrupt for packet DMA starvation  
SmartReflex sensor interrupt  
SmartReflex sensor interrupt  
SmartReflex sensor interrupt  
SmartReflex sensor interrupt  
VPVOLTUPDATE has been asserted but SMPS has not been responded to in a  
defined time interval  
142  
VPEqValue  
SRSINTERUPTZ is asserted, but the new voltage is not different from the  
current SMPS voltage  
143  
VPMaxVdd  
The new voltage required is equal to or greater than MaxVdd.  
The new voltage required is equal to or less than MinVdd.  
The FSM of Voltage processor is in idle.  
144  
VPMinVdd  
145  
VPINIDLE  
146  
VPOPPChangeDone  
Reserved  
The average frequency error is within the desired limit.  
147  
148  
UARTINT  
UART interrupt  
149  
URXEVT  
UART receive event  
150  
UTXEVT  
UART transmit event  
151  
QM_INT_PASS_TXQ_PEND_17  
QM_INT_PASS_TXQ_PEND_18  
QM_INT_PASS_TXQ_PEND_19  
QM_INT_PASS_TXQ_PEND_20  
QM_INT_PASS_TXQ_PEND_21  
QM_INT_PASS_TXQ_PEND_22  
QM_INT_PASS_TXQ_PEND_23  
QM_INT_PASS_TXQ_PEND_24  
QM_INT_PASS_TXQ_PEND_25  
Queue manager pend event  
Queue manager pend event  
Queue manager pend event  
Queue manager pend event  
Queue manager pend event  
Queue manager pend event  
Queue manager pend event  
Queue manager pend event  
Queue manager pend event  
152  
153  
154  
155  
156  
157  
158  
159  
End of Table 7-39  
Table 7-40  
CIC2 Event Inputs (Secondary Events for EDMA3CC1 and EDMA3CC2) (Part 1 of 5)  
Input Event # on CIC System Interrupt  
Description  
0
1
2
3
GPINT8  
GPINT9  
GPINT10  
GPINT11  
GPIO interrupt  
GPIO interrupt  
GPIO interrupt  
GPIO interrupt  
164  
Peripheral Information and Electrical Specifications  
Copyright 2012 Texas Instruments Incorporated  
 
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