TMS320C6672
Multicore Fixed and Floating-Point Digital Signal Processor
SPRS708C—February 2012
www.ti.com
Table 7-40
CIC2 Event Inputs (Secondary Events for EDMA3CC1 and EDMA3CC2) (Part 5 of 5)
Input Event # on CIC System Interrupt
Description
133
Reserved
134
Reserved
135
Reserved
136
Reserved
137
Reserved
138
QM_INT_HIGH_0
QM_INT_HIGH_1
QM_INT_HIGH_2
QM_INT_HIGH_3
QM_INT_HIGH_4
QM_INT_HIGH_5
QM_INT_HIGH_6
QM_INT_HIGH_7
QM_INT_HIGH_8
QM_INT_HIGH_9
QM_INT_HIGH_10
QM_INT_HIGH_11
QM_INT_HIGH_12
QM_INT_HIGH_13
QM_INT_HIGH_14
QM_INT_HIGH_15
Reserved
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
QM interrupt
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154-159
End of Table 7-40
Table 7-41
CIC3 Event Inputs (Secondary Events for EDMA3CC0 and HyperLink) (Part 1 of 3)
Input Event # on CIC
System Interrupt
GPINT0
Description
0
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
System TETB is half full
System TETB is full
1
GPINT1
2
GPINT2
3
GPINT3
4
GPINT4
5
GPINT5
6
GPINT6
7
GPINT7
8
GPINT8
9
GPINT9
10
11
12
13
14
15
16
17
GPINT10
GPINT11
GPINT12
GPINT13
GPINT14
GPINT15
TETBHFULLINT
TETBFULLINT
168
Peripheral Information and Electrical Specifications
Copyright 2012 Texas Instruments Incorporated
TI [ TEXAS INSTRUMENTS ]
