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TMS320C6672ACYP25 参数 Datasheet PDF下载

TMS320C6672ACYP25图片预览
型号: TMS320C6672ACYP25
PDF下载: 下载PDF文件 查看货源
内容描述: 多核固定和浮点数字信号处理器 [Multicore Fixed and Floating-Point Digital Signal Processor]
分类和应用: 数字信号处理器
文件页数/大小: 228 页 / 2410 K
品牌: TI [ TEXAS INSTRUMENTS ]
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TMS320C6672  
Multicore Fixed and Floating-Point Digital Signal Processor  
SPRS708C—February 2012  
www.ti.com  
There are a large amount of events on the chip level. The chip level CIC provides a flexible way to combine and  
remap those events. Multiple events can be combined to a single event through chip level CIC. However, an event  
can only be mapped to a single event output from the chip level CIC. The chip level CIC also allows the software to  
trigger system event through memory writes. The broadcast events to C66x CorePacs can be used for  
synchronization among multiple cores or inter-processor communication purpose and etc. For more details on the  
CIC features, please refer to the Chip Interrupt Controller (CIC) for KeyStone Devices User Guide in ‘‘Related  
Documentation from Texas Instruments’’ on page 69.  
Note—Modules such as MPU, Tracer, and BOOT_CFG have level interrupts and EOI handshaking  
interface. The EOI value is 0 for MPU, Tracer, and BOOT_CFG.  
Figure 7-29 shows the C6672 interrupt topology.  
Figure 7-29  
TMS320C6672 Interrupt Topology  
98 Primary Events  
17 Secondary Events  
Core0  
Core1  
14 Reserved Secondary Events  
89 Core-only Secondary Events  
57 Common Events  
5 Reserved Primary Events  
98 Primary Events  
17 Secondary Events  
CIC0  
5 Reserved Primary Events  
8 Broadcast Events from CIC0  
32 Primary Events  
26 Secondary Events  
EDMA3  
CC1  
57 Common Events  
6 Reserved Primary Events  
39 Reserved Secondary Events  
CIC2  
34 Primary Events  
24 Secondary Events  
64 EDMA3CC-only  
Secondary Events  
EDMA3  
CC2  
6 Reserved Primary Events  
32 Primary Events  
HyperLink  
41 Reserved Secondary Events  
39 Events  
32 Secondary Events  
CIC3  
8 Primary Events  
EDMA3  
CC0  
8 Secondary Events  
Table 7-38 shows the mapping of system events. For more information on the Interrupt Controller, see the C66x  
CorePac User Guide in ‘‘Related Documentation from Texas Instruments’’ on page 69.  
Table 7-38  
TMS320C6672 System Event Mapping — C66x CorePac Primary Interrupts (Part 1 of 4)  
Event Number  
Interrupt Event  
EVT0  
Description  
0
1
2
Event combiner 0 output  
Event combiner 1 output  
Event combiner 2 output  
EVT1  
EVT2  
Copyright 2012 Texas Instruments Incorporated  
Peripheral Information and Electrical Specifications 157  
 
 
 
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