TLC5970
SBVS140 –MARCH 2010
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The data bit assignments are shown in Table 9 and Figure 27. OUTn set the current ratio in select BC data; see
Table 3.
Table 9. Global Brightness Control and Function Control Data Latch Bit Assignment
BIT NUMBER
BIT NAME
DESCRIPTION
6-0
BCDATA
Global brightness control (BC) data for all outputs (default = 7Fh)
Auto data refresh (default = 0)
0 = Disabled; the GS and BC first and second data latches are
simultaneously updated by the internal data latch pulse.
1 = Enabled; the GS and BC second data latches are updated with
the data in the first latch at the 4096th rising edge of the grayscale
clock or the display timing reset timing.
7
8
9
DATRFH
DSPRPT
EXTCLK
Auto display repeat (default = 0)
0 = Disabled; all OUTn on/off controls are not repeated. The output
is turned on and off one time only after the GS clock counter is reset.
1 = Enabled; all OUTn on/off controls are repeated according to the
4096th GS clock after the GS clock counter is reset.
External grayscale clock select (default = 0)
0 = Internal clock is selected; each OUTn on/off control timing is
synchronized with the internal clock.
1 = External clock is selected; each OUTn on/off timing control is
synchronized with the shift clock generated by the differential signal
with the SCKA and SCKB input pin.
Display timing reset (default = 0)
0 = Disabled; the GS clock counter is not reset and all OUTn are not
forced off when the internal latch pulse is generated for GS data
writing. This bit is always '0' when the internal clock is selected.
1 = Enabled; the GS clock counter is reset and all OUTn are forced
off whenever an internal latch pulse is generated for GS data writing.
This bit can be set to '1' only when the external clock is selected.
10
TMGRST
Dot Correction (DC) data write control (default = 0)
0 = Disabled; the DC data latch is fixed to the DC data in the
EEPROM and DC data cannot be changed.
1 = Enabled; the DC data latch is not fixed to the DC data in the
EEPROM and the data in the DC data latch can be changed via
serial interface.
11
DCENA
—
No assigned bit (24-bit data).
No function has not been assigned to these bits. If any data are
written to these bits, device operation is not affected.
35-12
Function Control and Global Brightness Control First Data Latch
MSB
11
LSB
0
10
9
8
7
6
5
4
3
2
1
DC Data Display External
Timing
Reset
Auto Auto
Display Data
Repeat Refresh
Global
Global
Global
Global Global
BC Data BC Data BC Data BC Data BC Data BC Data BC Data
Global
Global
Write
Control
GS
Clock
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MSB
6
LSB
0
5
4
3
2
1
Global
Global
Global
Global
Global
Global
Global
4
BC Data BC Data BC Data BC Data BC Data BC Data BC Data
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Global Brightness Control
Second Data Latch
7
To Constant-Current
Control Block
To Display Timing
Control Block
To Constant-Current Control Block
Figure 27. Function Control Data Latch Bit Assignment
34
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