TL16C552A, TL16C552AM
DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT
WITH FIFO
SLLS189D – NOVEMBER 1994 – REVISED JANUARY 1999
PARAMETER MEASUREMENT INFORMATION
ENIRQ
ACK
50%
50%
t
d14
t
d13
50%
50%
INT2
Line Printer
Status Register,
Bit 2 (PRINT)
50%
t
d(int
(see Note A)
IOR
(RD_LPS)
50%
in the tables because the line printer status register, bit 2 (PRINT) is an internal signal.
NOTE A: A timing value is not provided for t
d(int)
Figure 16. Parallel Port AT Mode Timing (ENIRQ = Low) Waveforms
ENIRQ
50%
ACK
t
t
d16
d15
50%
50%
INT2
PRINT
IOR
(RD_LPS)
50%
Figure 17. Parallel Port PS/2 Mode Timing (ENIRQ = High) Waveforms
50%
50%
RESET
t
w3
Figure 18. RESET Voltage Waveform
17
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