SN65HVS883
www.ti.com.cn
ZHCSFI0 –SEPTEMBER 2016
7 Parameter Measurement Information
7.1 Waveforms
For the complete serial interface timing, refer to Figure 21.
tw2
LD
LD
tREC
tPLH2
tPHL2
CLK
SOP
Figure 7. Parallel – Load Mode
Figure 8. Serial – Shift Mode
valid
1/fCLK
t
w1
SIP
CLK
tSU 1
tH1
t
PHL1
t
PLH1
CLK
SOP
t
r
Figure 9. Serial – Shift Mode
Figure 10. Serial – Shift Mode
CLK
tSU2
CE
CLK inhibited
Figure 11. Serial – Shift Clock Inhibit Mode
7.2 Signal Conventions
R
IN
IPx
I
IN
SN65HVS883
V
V
TH(IN)
TH(IP)
FGND
Copyright © 2016, Texas Instruments Incorporated
Figure 12. On/Off Threshold Voltage Measurements
Copyright © 2016, Texas Instruments Incorporated
9
TI [ TEXAS INSTRUMENTS ]
