RM46L450
RM46L850
www.ti.com
SPNS184 –SEPTEMBER 2012
4.9.2 Memory Map Table
Please refer to and for a block diagrams showing the devices interconnect.
Table 4-21. Device Memory Map
FRAME ADDRESS RANGE
RESPNSE FOR ACCESS TO
UNIMPLEMENTED LOCATIONS IN
FRAME
FRAME CHIP
SELECT
FRAME ACTUA
SIZE L SIZE
MODULE NAME
START
END
Memories tightly coupled to the ARM Cortex-R4F CPU
TCM Flash
CS0
0x0000_0000
0x0800_0000
0x00FF_FFFF
0x0BFF_FFFF
16MB 1.25MB
64MB 192kB
16MB 1.25MB
TCM RAM + RAM
ECC
CSRAM0
Abort
Flash mirror
frame
Mirrored Flash
0x2000_0000
0x20FF_FFFF
External Memory Accesses
EMIF Chip Select
2 (asynchronous)
EMIF select 2
EMIF select 3
EMIF select 4
EMIF select 0
0x6000_0000
0x6400_0000
0x6800_0000
0x8000_0000
0x63FF_FFFF
0x67FF_FFFF
0x6BFF_FFFF
0x87FF_FFFF
64MB
32kB
32kB
32kB
64MB
EMIF Chip Select
3 (asynchronous)
64MB
64MB
Access to "Reserved" space will
generate Abort
EMIF Chip Select
4 (asynchronous)
EMIF Chip Select
0 (synchronous)
128MB
Flash Module Bus2 Interface
Customer OTP,
TCM Flash Banks
0xF000_0000
0xF000_E000
0xF000_1FFF
0xF000_FFFF
8kB
8kB
4kB
4kB
Customer OTP,
Bank 7
Customer
OTP–ECC, TCM
Flash Banks
0xF004_0000
0xF004_1C00
0xF004_03FF
0xF004_1FFF
1kB
1kB
512B
512B
Customer
OTP–ECC,
Bank 7
TI OTP, TCM
Flash Banks
0xF008_0000
0xF008_E000
0xF00C_0000
0xF00C_1C00
0xF008_1FFF
0xF008_FFFF
0xF00C_03FF
0xF00C_1FFF
8kB
8kB
1kB
1kB
4kB
4kB
Abort
TI OTP,
Bank 7
TI OTP–ECC,
TCM Flash Banks
512B
512B
TI OTP–ECC,
Bank 7
Bank 7 – ECC
Bank 7
0xF010_0000
0xF020_0000
0xF013_FFFF
0xF03F_FFFF
256kB
2MB
8kB
64kB
Flash Data Space
ECC
0xF040_0000
0xF04F_FFFF
1MB
160kB
Ethernet and EMIF slave interfaces
CPPI Memory
Slave (Ethernet
RAM)
0xFC52_0000
0xFCF7_8000
0xFC52_1FFF
0xFCF7_87FF
8kB
2kB
8kB
2kB
Abort
CPGMAC Slave
(Ethernet Slave)
No error
CPGMACSS
Wrapper
(Ethernet
Wrapper)
0xFCF7_8800
0xFCF7_8900
0xFCF7_88FF
0xFCF7_89FF
256B
256B
256B
256B
No error
No error
Ethernet MDIO
Interface
Copyright © 2012, Texas Instruments Incorporated
System Information and Electrical Specifications
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