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PCI6421 参数 Datasheet PDF下载

PCI6421图片预览
型号: PCI6421
PDF下载: 下载PDF文件 查看货源
内容描述: 双/单插槽的CardBus和UltraMedia控制器 [DUAL/SINGLE SOCKET CARDBUS AND ULTRAMEDIA CONTROLLER]
分类和应用: 控制器
文件页数/大小: 204 页 / 849 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号PCI6421的Datasheet PDF文件第82页浏览型号PCI6421的Datasheet PDF文件第83页浏览型号PCI6421的Datasheet PDF文件第84页浏览型号PCI6421的Datasheet PDF文件第85页浏览型号PCI6421的Datasheet PDF文件第87页浏览型号PCI6421的Datasheet PDF文件第88页浏览型号PCI6421的Datasheet PDF文件第89页浏览型号PCI6421的Datasheet PDF文件第90页  
4.15 PCI Bus Number Register  
The PCI bus number register is programmed by the host system to indicate the bus number of the PCI bus to which  
the PCI6x21/PCI6x11 controller is connected. The PCI6x21/PCI6x11 controller uses this register in conjunction with  
the CardBus bus number and subordinate bus number registers to determine when to forward PCI configuration  
cycles to its secondary buses.  
Bit  
7
6
5
4
3
2
1
0
Name  
Type  
Default  
PCI bus number  
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
Register:  
Offset:  
Type:  
PCI bus number  
18h (Functions 0, 1)  
Read/Write  
Default:  
00h  
4.16 CardBus Bus Number Register  
The CardBus bus number register is programmed by the host system to indicate the bus number of the CardBus bus  
to which the PCI6x21/PCI6x11 controller is connected. The PCI6x21/PCI6x11 controller uses this register in  
conjunction with the PCI bus number and subordinate bus number registers to determine when to forward PCI  
configuration cycles to its secondary buses. This register is separate for each PCI6x21/PCI6x11 controller function.  
Bit  
7
6
5
4
3
2
1
0
Name  
Type  
Default  
CardBus bus number  
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
Register:  
Offset:  
Type:  
CardBus bus number  
19h  
Read/Write  
00h  
Default:  
4.17 Subordinate Bus Number Register  
The subordinate bus number register is programmed by the host system to indicate the highest numbered bus below  
the CardBus bus. The PCI6x21/PCI6x11 controller uses this register in conjunction with the PCI bus number and  
CardBus bus number registers to determine when to forward PCI configuration cycles to its secondary buses. This  
register is separate for each CardBus controller function.  
Bit  
7
6
5
4
3
2
1
0
Name  
Type  
Default  
Subordinate bus number  
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
RW  
0
Register:  
Offset:  
Type:  
Subordinate bus number  
1Ah  
Read/Write  
00h  
Default:  
4−10  
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