9.23 Subsystem ID Alias Register
The contents of the subsystem access register are aliased to the subsystem vendor ID and subsystem ID registers
at PCI offsets 2Ch and 2Eh, respectively. See Table 9−14 for a complete description of the register contents.
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Type
Default
Bit
Subsystem ID alias
RW
1
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
1
RW
1
RW
0
RW
1
RW
0
RW
1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Type
Default
Subsystem ID alias
RW
0
RW
0
RW
0
RW
1
RW
0
RW
0
RW
0
RW
0
RW
0
RW
1
RW
0
RW
0
RW
1
RW
1
RW
0
RW
0
Register:
Offset:
Type:
Subsystem ID alias
50h
Read/Write (EEPROM, GRST only)
8035 104Ch
Default:
Table 9−14. Subsystem ID Alias Register Description
BIT
FIELD NAME
TYPE
DESCRIPTION
31−16
SubsystemID
RW
Subsystem device ID. The value written to this field is aliased to the subsystem ID register at
PCI offset 2Eh.
15−0
SubsystemVendorID
RW
Subsystem vendor ID. The value written to this field is aliased to the subsystem vendor ID
register at PCI offset 2Ch.
9.24 Class Code Alias Register
This register is alias of the class code. Not like original register, this register is read/write and loadable from EEPROM.
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Type
Default
Bit
Class code alias
RW
0
RW
0
RW
0
RW
0
RW
0
RW
1
RW
1
RW
1
RW
1
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Type
Default
Class code alias
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
R
0
R
0
R
0
R
0
R
0
R
0
Register:
Offset:
Type:
Class code alias
54h
Read-only, Read/Write (EEPROM, GRST only)
0780 0000h
Default:
9−14
TI [ TEXAS INSTRUMENTS ]
