8.19 Power Management Control and Status Register
The power management control and status register implements the control and status of the SD host controller. This
register is not affected by the internally generated reset caused by the transition from the D3
Table 8−14 for a complete description of the register contents.
to D0 state. See
hot
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Type
Default
Power management control and status
RCU
0
R
0
R
0
R
0
R
0
R
0
R
0
RW
0
R
0
R
0
R
0
R
0
R
0
R
0
RW
0
RW
0
Register:
Offset:
Type:
Power management control and status
84h
Read/Clear, Read/Write, Read-only
0000h
Default:
Table 8−14. Power Management Control and Status Register Description
BIT
15 ‡
FIELD NAME
PME_STAT
TYPE
RCU
R
DESCRIPTION
PME status. This bit defaults to 0.
14−13
DATA_SCALE
Data scale. This field returns 0s when read, because the SD host controller does not use the data
register.
12−9
DATA_SELECT
R
Data select. This field returns 0s when read, because the SD host controller does not use the data
register.
8 ‡
7−2
PME_EN
RSVD
RW
R
PME enable. Enables PME signaling.
Reserved. Bits 7−2 return 0s when read.
1−0 ‡
PWR_STATE
RW
Power state. This 2-bit field determines the current power state and sets the SD host controller to a
new power state. This field is encoded as follows:
00 = Current power state is D0.
01 = Current power state is D1.
10 = Current power state is D2.
11 = Current power state is D3
.
hot
‡
One or more bits in this register are cleared only by the assertion of GRST.
8.20 Power Management Bridge Support Extension Register
The power management bridge support extension register provides extended power-management features not
applicable to the SD host controller; thus, it is read-only and returns 00h when read.
Bit
7
6
5
4
3
2
1
0
Name
Type
Default
Power management bridge support extension
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
Register:
Offset:
Type:
Power management bridge support extension
86h
Read-only
00h
Default:
8−13
TI [ TEXAS INSTRUMENTS ]
