8.8 SD Host Base Address Register
The SD host base address register specifies the base address of the memory-mapped interface registers for each
standard SD host socket. The size of each base address register (BAR) is 256 bytes. The number of BARs is
dependent on the number of SD sockets in the implementation See Table 8−7 for a complete description of the
register contents.
Bit
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Name
Type
Default
Bit
SD host base address
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
RW
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Type
Default
SD host base address
RW
0
RW
0
RW
0
RW
0
RW
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
Register:
Offset:
Type:
SD host base address
10h
Read/Write, Read-only
0000 0000h
Default:
Table 8−7. SD host Base Address Register Description
BIT
FIELD NAME
TYPE
DESCRIPTION
31−8
BAR
RW
Base address. This field specifies the upper 24 bits of the 32-bit starting base address. The size of
the base address is 256 bytes.
7−4
3
RSVD
R
R
R
R
Reserved. Bits 7−4 return 0s when read.
PREFETCHABLE
TYPE
Prefetchable indicator. This bit is hardwired to 0 to indicate that the memory space is not prefetchable.
This field is hardwired to 00 to indicate that the base address is located in 32-bit address space.
2−1
0
MEM_INDICATOR
Memory space indicator. Bit 0 is hardwired to 0 to indicate that the base address maps into memory
space.
8.9 Subsystem Vendor Identification Register
The subsystem identification register, used for system and option card identification purposes, may be required for
certain operating systems. This read-only register is initialized through the EEPROM and can be written through the
subsystem access register at PCI offset 8Ch (see Section 8.23). All bits in this register are reset by GRST only.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
Type
Default
Subsystem vendor identification
RU
0
RU
0
RU
0
RU
0
RU
0
RU
0
RU
0
RU
0
RU
0
RU
0
RU
0
RU
0
RU
0
RU
0
RU
0
RU
0
Register:
Offset:
Type:
Subsystem vendor identification
2Ch
Read/Update
0000h
Default:
8−7
TI [ TEXAS INSTRUMENTS ]
