7.20 Power Management Data Register
The power management bridge support extension register provides extended power-management features not
applicable to the flash media controller; thus, it is read-only and returns 0 when read.
Bit
7
6
5
4
3
2
1
0
Name
Type
Default
Power management data
R
0
R
0
R
0
R
0
R
0
R
0
R
0
R
0
Register:
Offset:
Type:
Power management data
4Bh
Read-only
00h
Default:
7.21 General Control Register
The general control register provides miscellaneous PCI-related configuration. See Table 7−14 for a complete
description of the register contents.
Bit
7
6
5
4
3
2
1
0
Name
Type
Default
General control
R
0
R
0
R
0
RW
0
RW
0
RW
0
RW
0
RW
0
Register:
Offset:
Type:
General control
4Ch
Read/Write, Read-only
00h
Default:
Table 7−14. General Control Register
BIT
7
FIELD NAME
RSVD
TYPE
R
DESCRIPTION
Reserved. Bit 7 returns 0 when read.
6−5 ‡
INT_SEL
RW
Interrupt select. These bits are program the INTPIN register and set which interrupt output is used.
This field is ignored if one of the USE_INTx terminals is asserted.
00 = INTA
01 = INTB
10 = INTC
11 = INTD
4 ‡
D3_COLD
RW
D3
cold
PME support. This bit sets and clears the D3
capabilities register.
PME support bit in the power management
cold
3
RSVD
R
Reserved. Bit 3 returns 0 when read.
2 ‡
SM_DIS
RW
SmartMedia disable. Setting this bit disables support for SmartMedia cards. The flash media
controller reports a SmardMedia card as an unsupported card if this bit is set. If this bit is set, then
all of the SM_SUPPORT bits in the socket enumeration register are 0.
1 ‡
0 ‡
MMC_SD_DIS
MS_DIS
RW
RW
MMC/SD disable. Setting this bit disables support for MMC/SD cards. The flash media controller
reports a MMC/SD card as an unsupported card if this bit is set. If this bit is set, then all of the
SD_SUPPORT bits in the socket enumeration register are 0.
Memory Stick disable. Setting this bit disables support for Memory Stick cards. The flash media
controller reports a Memory Stick card as an unsupported card if this bit is set. If this bit is set, then
all of the MS_SUPPORT bits in the socket enumeration register are 0.
‡
One or more bits in this register are cleared only by the assertion of GRST.
7−13
TI [ TEXAS INSTRUMENTS ]
