6.2 Recommended Operating Conditions (see Note 3)
OPERATION
MIN NOM
MAX UNIT
V
Supply voltage (core)
Commercial
Commercial
3.3 V
3.3 V
5 V
3
3
3.3
3.3
5
3.6
3.6
V
CC
PV
PCI primary bus I/O clamping rail voltage
V
CCP
CCP
4.75
3
5.25
3.6
3.3 V
5 V
3.3
5
SV
PCI secondary bus I/O clamping rail voltage
High-level input voltage
Commercial
PCI
V
V
4.75
5.25
3.3 V
5 V
0.5 V
V
V
CCP
2
CCP
†
V
IH
CCP
‡
TTL
PCI
3.3 V
3.3 V
5 V
2.25
0
V
CC
0.3 V
CCP
0.8
†
0
High-level input voltage
V
V
IL
‡
TTL
PCI
TTL
0
0
0
0
0
1
0
0
0
0.75
CCP
V
V
V
Input voltage
V
V
I
‡
V
V
V
CC
CC
3.3 V
5 V
§
Output voltage
O
CC
4
PCI
TTL
Input transition time (t and t )
nS
t
t
r
f
‡
6
3.3 V
5 V
25
25
70
Operating ambient temperature range
Virtual junction temperature
T
A
¶
°C
115
T
J
NOTES: 3. Unused or floating pins (input or I/O) must be held high or low.
†
‡
Applies for external input and bidirectional buffers without hysteresis
TTL terminals are Schmitt-trigger input-only terminals: 55, 69, 132, 174 for PGF-packaged device; and 49, 63, 120, 159 for PCM-packaged
device.
§
¶
Applies for external output buffers
These junction temperatures reflect simulation conditions. The customer is responsible for verifying junction temperature.
6.3 Recommended Operating Conditions for PCI Interface
OPERATION
MIN NOM
MAX
3.6
UNIT
V
V
Core voltage
Commercial
Commercial
3.3 V
3.3 V
5 V
3
3.3
3.3
5
V
CC
3
4.75
0
3.6
PCI supply voltage
V
V
V
V
V
CCP
5.25
3.3 V
5 V
V
CCP
CCP
CCP
CCP
V
V
V
V
Input voltage
I
0
V
V
V
3.3 V
5 V
0
§
Output voltage
O
0
3.3 V
5 V
0.5 V
CCP
2
¶
CMOS compatible
CMOS compatible
High-level input voltage
Low-level input voltage
IH
3.3 V
5 V
0.3 V
CCP
0.8
¶
IL
§
¶
Applies to external output buffers
Applies to external input and bidirectional buffers without hysteresis
6–2
TI [ TEXAS INSTRUMENTS ]
