5.2 Extended Diagnostic Register
The extended diagnostic register is read or write and has a default value of 00h. Bit 0 of this register is used to reset
both the PCI2250 and the secondary bus.
Bit
7
6
5
4
3
2
1
0
Name
Type
Default
Extended diagnostic
R
0
R
0
R
0
R
0
R
0
R
0
R
0
W
0
Register:
Type:
Extended diagnostic
Read-only, Write-only
Offset:
Default:
41h
00h
Table 5–2. Extended Diagnostic Register
BIT
TYPE
FUNCTION
7–1
R
Reserved. Bits 7–1 return 0s when read.
Writing a 1 to this bit causes the PCI2250 to set bit 6 of the bridge control register (offset 3Eh, see Section 4.32) and then
internally reset the PCI2250. Bit 6 of the bridge control register will not be reset by the internal reset. Bit 0 is self-clearing.
0
W
5–2