OMAP-L137 Low-Power Applications Processor
SPRS563A–SEPTEMBER 2008–REVISED OCTOBER 2008
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Table 6-48. SPIx Configuration Registers (continued)
SPI0
BYTE ADDRESS
SPI1
REGISTER NAME
DESCRIPTION
BYTE ADDRESS
0x01E1 2048
0x01E1 204C
0x01E1 2050
0x01E1 2054
0x01E1 2058
0x01E1 205C
0x01E1 2060
0x01E1 2064
0x01C4 1048
0x01C4 104C
0x01C4 1050
0x01C4 1054
0x01C4 1058
0x01C4 105C
0x01C4 1060
0x01C4 1064
SPIDELAY
SPIDEF
Delay Register
Default Chip Select Register
Format Register 0
SPIFMT0
SPIFMT1
SPIFMT2
SPIFMT3
INTVEC0
INTVEC1
Format Register 1
Format Register 2
Format Register 3
Interrupt Vector for SPI INT0
Interrupt Vector for SPI INT1
148
Peripheral Information and Electrical Specifications
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