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NE5532PSE4 参数 Datasheet PDF下载

NE5532PSE4图片预览
型号: NE5532PSE4
PDF下载: 下载PDF文件 查看货源
内容描述: [DUAL OP-AMP, 5000uV OFFSET-MAX, 10MHz BAND WIDTH, PDSO8, PLASTIC, SO-8]
分类和应用: 放大器光电二极管
文件页数/大小: 142 页 / 1062 K
品牌: TI [ TEXAS INSTRUMENTS ]
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XIO3130  
SLLS693FMAY 2007REVISED JANUARY 2010  
www.ti.com  
4.2.69 TI Proprietary Register  
This read/write TI proprietary register is located at offset D4h and controls TI proprietary functions. This  
register must not be changed from the specified default state. If the default value is changed in error, a  
PCI Express Reset (PERST) returns this register to a default state.  
If an EEPROM is used to load configuration registers, the value loaded for register D5h must be 10h.  
PCI register offset:  
Register type:  
D4h  
Read/Write  
0000 0010  
Default value:  
BIT NUMBER  
RESET STATE  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BIT NUMBER  
RESET STATE  
15  
14  
13  
12  
11  
10  
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
4.2.70 TI Proprietary Register  
This read/write TI proprietary register is located at offset D8h and controls TI proprietary functions. This  
register must not be changed from the specified default state. If the default value is changed in error, a  
PCI Express Reset (PERST) returns this register to a default state.  
PCI register offset:  
Register type:  
D8h  
Read/Write  
0000 0000h  
Default value:  
BIT NUMBER  
RESET STATE  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BIT NUMBER  
RESET STATE  
15  
14  
13  
12  
11  
10  
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4.2.71 TI Proprietary Register  
This read/write TI proprietary register is located at offset DCh and controls TI proprietary functions. This  
register must not be changed from the specified default state. If the default value is changed in error, a  
PCI Express Reset (PERST) returns this register to a default state.  
PCI register offset:  
Register type:  
DCh  
Read/Write  
0000 0002h  
Default value:  
BIT NUMBER  
RESET STATE  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BIT NUMBER  
RESET STATE  
15  
14  
13  
12  
11  
10  
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
76  
XIO3130 Configuration Register Space  
Copyright © 2007–2010, Texas Instruments Incorporated  
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Product Folder Link(s): XIO3130