XIO3130
www.ti.com
SLLS693F–MAY 2007–REVISED JANUARY 2010
4.2.66 TI Proprietary Register
This read/write TI proprietary register is located at offset C8h and controls TI proprietary functions. This
register must not be changed from the specified default state. If the default value is changed in error, a
PCI Express Reset (PERST) returns this register to a default state.
If an EEPROM is used to load configuration registers, the value loaded for this register must be
00000001h.
PCI register offset:
Register type:
C8h
Read/Write
xxxx 0001h
Default value:
BIT NUMBER
RESET STATE
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BIT NUMBER
RESET STATE
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
4.2.67 TI Proprietary Register
This read/write TI proprietary register is located at offset CCh and controls TI proprietary functions. This
register must not be changed from the specified default state. If the default value is changed in error, a
PCI Express Reset (PERST) returns this register to a default state.
If an EEPROM is used to load configuration registers, the value loaded for this register must be
00000000h.
PCI register offset:
Register type:
CCh
Read/Write
0000 0000h
Default value:
BIT NUMBER
RESET STATE
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BIT NUMBER
RESET STATE
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4.2.68 TI Proprietary Register
This read/write TI proprietary register is located at offset D0h and controls TI proprietary functions. This
register must not be changed from the specified default state. If the default value is changed in error, a
PCI Express Reset (PERST) returns this register to a default state.
If an EEPROM is used to load configuration registers, the value loaded for this register must be
32140000h.
PCI register offset:
Register type:
D0h
Read/Write
3214 0000h
Default value:
BIT NUMBER
RESET STATE
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
0
0
1
1
0
0
1
0
0
0
0
1
0
1
0
0
BIT NUMBER
RESET STATE
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
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XIO3130 Configuration Register Space
75
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