欢迎访问ic37.com |
会员登录 免费注册
发布采购

NE5532PSE4 参数 Datasheet PDF下载

NE5532PSE4图片预览
型号: NE5532PSE4
PDF下载: 下载PDF文件 查看货源
内容描述: [DUAL OP-AMP, 5000uV OFFSET-MAX, 10MHz BAND WIDTH, PDSO8, PLASTIC, SO-8]
分类和应用: 放大器光电二极管
文件页数/大小: 142 页 / 1062 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号NE5532PSE4的Datasheet PDF文件第63页浏览型号NE5532PSE4的Datasheet PDF文件第64页浏览型号NE5532PSE4的Datasheet PDF文件第65页浏览型号NE5532PSE4的Datasheet PDF文件第66页浏览型号NE5532PSE4的Datasheet PDF文件第68页浏览型号NE5532PSE4的Datasheet PDF文件第69页浏览型号NE5532PSE4的Datasheet PDF文件第70页浏览型号NE5532PSE4的Datasheet PDF文件第71页  
XIO3130  
www.ti.com  
SLLS693FMAY 2007REVISED JANUARY 2010  
Table 4-36. Bit Descriptions – GPIO B Control Register  
BIT  
FIELD NAME  
ACCESS  
DESCRIPTION  
15  
RSVD  
r
Reserved, reads back zero  
GPIO 9 Control. This field controls the GPIO9 pin as follows:  
000 – General Purpose Input (default)  
001 – General Purpose Output  
010 – Port 1 EMIL_CTL0  
011 – Port 2 EMIL_CTL2  
100 – Port 1 ATN_LED0  
101 – Port 2 ATN_LED1  
14:12  
PCIE_GPIO9_CTL  
rw  
110 – Port 1 PWR_LED0  
111 – Port 2 PWR_LED1  
See GPIO Data register for a detailed description of this field.  
This field is loaded from EEPROM (if present), and reset with FRST.  
If the DN3_DPSTRP terminal is pulled high at the de-assertion of reset, the GPIO9 terminal  
is directly mapped as the PWR_ON PCI Hot Plug terminal for port 3 and is no longer  
available for use as a GPIO. In this situation these bits have no meaning and should be left  
at their default value.  
GPIO 8 Control. This field controls the GPIO8 pin as follows:  
000 – General Purpose Input (default)  
001 – General Purpose Output  
010 – Port 1 ACT_BTN0  
011 – Port 2 ACT_BTN1  
100 – Port 1 PWRFLT0  
101 – Port 2 PWRFLT1  
11:9  
PCIE_GPIO8_CTL  
rw  
110 – Port 1 EMIL_ENG0  
111 – Port 2 EMIL_ENG1  
See GPIO Data register for a detailed description of this field.  
This field is loaded from EEPROM (if present), and reset with FRST.  
If the DN3_DPSTRP terminal is pulled high at the de-assertion of reset, the GPIO8 terminal  
is directly mapped as the PRESENT PCI Hot Plug terminal for port 3 and is no longer  
available for use as a GPIO. In this situation these bits have no meaning and should be left  
at their default value.  
GPIO 7 Control. This field controls the GPIO7 pin as follows:  
000 – General Purpose Input (default)  
001 – General Purpose Output  
010 – Port 2 CLKREQ1  
011 – Port 2 MRLS_DET1  
100 – Port 1 PWRFLT0  
8:6  
PCIE_GPIO7_CTL  
rw  
101 – Port 3 PWRFLT2  
110 – Port 1 MRLS_DET0  
111 – Port 3 MRLS_DET2,  
See GPIO Data register for a detailed description of this field.  
This field is loaded from EEPROM (if present), and reset with FRST.  
Copyright © 2007–2010, Texas Instruments Incorporated  
XIO3130 Configuration Register Space  
67  
Submit Documentation Feedback  
Product Folder Link(s): XIO3130