XIO3130
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SLLS693F–MAY 2007–REVISED JANUARY 2010
5.2.4 Debounce Circuits
Integrated de-bounce circuits are provided for the following input pins:
•
•
•
PRSNT[2:0] present detects for each downstream port; used with PCI Express or ExpressCard
(formerly NEWCARD) slots.
ATN_BTN[2:0], which are attention button inputs, are MUXed onto GPIO pins; de-bounce is only
needed when the relevant GPIO pins are programmed to this mode.
MRLS_DET[2:0], which are manual retention latch detection inputs, are MUXed onto GPIO pins;
de-bounce is only needed when the relevant GPIO pins are programmed to this mode.
A timeout of approximately 10 ms is used.
5.2.5 HP_INTX Pin
The HP_INTX output signal is asserted when a PCI Hot Plug interrupt occurs within the switch, but only
asserted due to PCI Hot Plug events. This signal is typically be connected on system boards to an SCI
(System Control Interrupt) input, which invokes an interrupt service routine included in the system BIOS;
other system implementations may connect HP_INTX to a PCI bus interrupt pin.
Copyright © 2007–2010, Texas Instruments Incorporated
PCI Hot Plug Implementation Overview
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