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NE5532PSE4 参数 Datasheet PDF下载

NE5532PSE4图片预览
型号: NE5532PSE4
PDF下载: 下载PDF文件 查看货源
内容描述: [DUAL OP-AMP, 5000uV OFFSET-MAX, 10MHz BAND WIDTH, PDSO8, PLASTIC, SO-8]
分类和应用: 放大器光电二极管
文件页数/大小: 142 页 / 1062 K
品牌: TI [ TEXAS INSTRUMENTS ]
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XIO3130  
SLLS693FMAY 2007REVISED JANUARY 2010  
www.ti.com  
PCI Express Differential Transmitter Output Ranges (continued)  
PARAMETER  
TERMINALS  
MIN NOM  
MAX UNIT  
COMMENTS  
Maximum time to meet all TX specifications when  
transitioning from electrical idle to sending  
differential data. This value is considered a  
de-bounce time for the TX to meet all TX  
specifications after leaving electrical idle.  
TTX-IDLE-to-DIFF-DATA  
Maximum time to transition to valid  
TX specifications after leaving an  
electrical idle condition  
PETP,  
PETN  
20  
UI  
RLTX-DIFF  
Differential return loss  
PETP,  
PETN  
Measured over 50 MHz to 1.25 GHz.  
See  
10  
6
dB  
dB  
(5)  
RLTX-CM  
Common mode return loss  
PETP,  
PETN  
Measured over 50 MHz to 1.25 GHz.  
(5)  
See  
ZTX-DIFF-DC  
DC differential TX impedance  
PETP,  
PETN  
80  
40  
75  
100  
120  
200  
TX DC differential mode low impedance  
ZTX-DC  
PETP,  
PETN  
Required TX-D+ as well as TX-D– DC impedance  
during all states  
Transmitter DC impedance  
CTX  
PETP,  
PETN  
All transmitters are AC-coupled and capacitors are  
required on the PWB.  
nF  
AC coupling capacitor  
(5) The transmitter input impedance results in a differential return loss greater than or equal to 12 dB and a common mode return loss  
greater than or equal to 6 dB over a frequency range of 50 MHz to 1.25 GHz. This input impedance requirement applies to all valid input  
levels. The reference impedance for return loss measurements is 50 to ground for both the P and N lines. Note that the series  
capacitors CTX is optional for the return loss measurement.  
6.4 PCI Express Differential Receiver Input Ranges  
PARAMETER  
TERMINALS  
MIN NOM  
MAX UNIT  
COMMENTS  
VRX-DIFFp-p  
Differential input peak-to-peak  
voltage  
PERP,  
PERN  
VRX-DIFFp-p = 2*|VRX-D+ – VRX-D–|  
See  
0.175  
1.2  
V
(1)  
The maximum interconnect media and transmitter  
jitter that can be tolerated by the Receiver is  
derived as TRX-MAX- JITTER = 1 - TRX-EYE = .6 UI  
TRX-EYE  
Minimum receiver eye width  
PERP, PERN  
0.4  
UI  
(1) (2) (3)  
See  
Jitter is defined as the measurement variation of  
the crossing points (VRX-DIFFp-p = 0 V) in relation to  
recovered TX UI. A recovered TX UI is calculated  
over 3500 consecutive unit intervals of sample  
data. Jitter is measured using all edges of the 250  
consecutive UI in the center of the 3500 UI used  
for calculating the TX UI.  
TRX-EYE-MEDIAN-to-MAX-JITTER  
Maximum time between the jitter  
median and maximum deviation  
from the median.  
PERP,  
PERN  
0.3  
UI  
(1) (2)  
See  
VRX-CM-ACp = RMS( |VRX-D+ + VRX-D–| / 2 –  
VRX-CM-DC)  
VRX-CM-ACp  
AC peak common mode input  
voltage  
PERP,  
PERN  
150  
mV  
VRX-CM-DC = DC(avg) of |VRX-D+ + VRX-D-| / 2  
(1)  
See  
(1) Specified at the measurement point and measured using the clock recovery function specified in PCI Express™ Base Specification  
Revision 1.1, Section 4.3.3.2. The test load in Figure 4-25 should be used as the RX device when taking measurements (also refer to  
the Receiver compliance eye diagram shown in Figure 4-26 of the specification). If the clocks to the RX and TX are not derived from the  
same reference clock, the TX UI recovered using the clock recovery function specified in Section 4.3.3.2 must be used as a reference  
for the eye diagram.  
(2) The TRX-EYE-MEDIAN-to-MAX-JITTER specification ensures a jitter distribution in which the median and the maximum deviation from the  
median is less than half of the total 0.64. It should be noted that the median is not the same as the mean. The jitter median describes  
the point in time where the number of jitter points on either side is approximately equal as opposed to the averaged time value. The RX  
UI recovered using the clock recovery function specified in Section 4.3.3.2 must be used as the reference for the eye diagram. This  
parameter is measured with the equivalent of a zero jitter reference clock. The TRX-EYE measurement is to be met at the target bit error  
rate. The TRX-EYE-MEDIAN-to-MAX-JITTER specification is to be met using the compliance pattern at a sample size of 1,000,000 UI.  
(3) See the PCI Express Jitter and BER white paper for more details on the Rx-Eye measurement.  
136  
Electrical Characteristics  
Copyright © 2007–2010, Texas Instruments Incorporated  
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