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NE5532PSE4 参数 Datasheet PDF下载

NE5532PSE4图片预览
型号: NE5532PSE4
PDF下载: 下载PDF文件 查看货源
内容描述: [DUAL OP-AMP, 5000uV OFFSET-MAX, 10MHz BAND WIDTH, PDSO8, PLASTIC, SO-8]
分类和应用: 放大器光电二极管
文件页数/大小: 142 页 / 1062 K
品牌: TI [ TEXAS INSTRUMENTS ]
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XIO3130  
SLLS693FMAY 2007REVISED JANUARY 2010  
www.ti.com  
Table 4-74. Bit Descriptions – Device Capabilities Register  
BIT  
FIELD NAME  
ACCESS  
DESCRIPTION  
Reserved. When read, these bits return zeros.  
31:28  
RSVD  
r
Captured slot power limit scale. This field is only applicable to upstream ports and is  
hardwired to zero.  
27:26  
CSPLS  
ru  
Captured slot power limit value. This field is only applicable to upstream ports and is  
hardwired to zero.  
25:18  
17:16  
15  
CSPLV  
RSVD  
RBER  
ru  
r
Reserved. When read, these bits return zeros.  
Role-based error reporting. This bit is set to 1b to indicate support for role-based error  
reporting.  
r
Power indicator present. This bit indicates whether the XIO3130 has a power indicator. This  
bit is hardwired to zero.  
14  
13  
PIP  
AIP  
r
r
Attention indicator present. This bit indicates whether the XIO3130 has an attention  
indicator. This bit is hardwired to zero.  
Attention button present. This bit indicates whether the XIO3130 has a power button. This bit  
is hardwired to zero.  
12  
11:6  
5
ABP  
RSVD  
ETFS  
r
r
r
Reserved. When read, these bits return zeros.  
Extended tag field supported. This bit indicates the size of the tag field supported. This bit is  
hardwired to 0, which indicates support for 5-bit tag fields.  
Phantom functions supported. This field is read-only 00b, which indicates that function  
numbers are not used for phantom functions.  
4:3  
2:0  
PFS  
r
r
Max payload size supported. This field indicates the maximum payload size that the device  
can support for TLPs. This field is encoded as 001b, which indicates that the maximum  
payload size for a TLP is 256 bytes.  
MPSS  
4.3.50 Device Control Register  
The Device Control register controls PCI Express device-specific parameters.  
PCI register offset:  
Register type:  
98h  
Read/Write; Read Only  
2000h  
Default value:  
BIT NUMBER  
RESET STATE  
15  
14  
13  
12  
11  
10  
9
8
7
6
5
4
3
2
1
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 4-75. Bit Descriptions – Device Control Register  
BIT  
FIELD NAME  
ACCESS  
DESCRIPTION  
Reserved. When read, this bit returns zero.  
15  
RSVD  
r
Max read request size. This field is programmed by the host software to set the maximum  
size of a read request that the XIO3130 can generate. The XIO3130 uses this field in  
conjunction with the Cache Line Size register to determine how much data to fetch on a  
read request. This field is encoded as:  
000 – 128B  
001 – 256B  
14:12  
MRRS  
rw  
010 – 512B (default)  
011 – 1024B  
100 – 2048B  
101 – 4096B  
110 – Reserved  
111 – Reserved  
Enable no snoop. Since the XIO3130 does not support setting the no-snoop attribute, this bit  
is read-only zero.  
11  
ENS  
r
108  
XIO3130 Configuration Register Space  
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Product Folder Link(s): XIO3130  
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