ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢄ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢃ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄꢅ ꢆꢇꢃ ꢆꢇ
ꢀ ꢉꢊꢋ ꢌ ꢁꢉ ꢍ ꢎꢏꢐ ꢀ ꢉꢑꢒꢓ ꢑꢓ ꢎꢔ ꢒꢓ ꢐꢐ ꢋꢒ
SLAS272F − JULY 2000 − REVISED JUNE 2004
APPLICATION INFORMATION
input/output schematic (continued)
port P2, P2.5, input/output with Schmitt-trigger and R
function for the basic clock module
osc
0: Input
1: Output
P2SEL.5
Pad Logic
0
1
0
1
P2DIR.5
Direction Control
From Module
P2.5/Rosc
P2OUT.5
Module X OUT
Bus Keeper
P2IN.5
EN
D
Internal to
Basic Clock
Module
Module X IN
P2IRQ.5
1
0
V
CC
Edge
Select
Interrupt
P2IE.5
EN
Q
Set
P2IFG.5
Interrupt
Flag
to
DC Generator
P2IES.5
P2SEL.5
DCOR
CAPD.5
DCOR: Control Bit From Basic Clock Module
If it Is Set, P2.5 Is Disconnected From P2.5 Pad
DIRECTION
PnSel.x
PnDIR.x
CONTROL
FROM MODULE
PnOUT.x MODULE X OUT PnIN.x
P2OUT.5 DV P2IN.5
MODULE X IN
PnIE.x PnIFG.x PnIES.x
P2Sel.5
P2DIR.5
P2DIR.5
unused
P2IE.5 P2IFG.5 P2IES.5
SS
43
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