ꢀ ꢁ ꢂꢃ ꢄ ꢅ ꢆꢇ ꢄꢆꢈ ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢃ ꢆꢈ ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆ ꢇ ꢃꢆ ꢇ
ꢀ ꢉ ꢊ ꢋꢌ ꢁꢉ ꢍꢎ ꢏ ꢐ ꢀꢉ ꢑ ꢒꢓꢑ ꢓꢎ ꢔꢒ ꢓꢐ ꢐꢋ ꢒ
SLAS272F − JULY 2000 − REVISED JUNE 2004
APPLICATION INFORMATION
input/output schematic
port P1, P1.0 to P1.7, input/output with Schmitt-trigger
P1SEL.x
0
P1DIR.x
Direction Control
1
0
1
From Module
Pad Logic
P1.0/TACLK ..
P1.7/TA2
P1OUT.x
Module X OUT
P1IN.x
EN
D
Module X IN
P1IRQ.x
P1IE.x
Interrupt
Edge
Select
EN
Q
Set
P1IFG.x
Interrupt
Flag
P1IES.x
P1SEL.x
Dir. CONTROL
FROM MODULE
PnSel.x
PnDIR.x
PnOUT.x MODULE X OUT PnIN.x
MODULE X IN
PnIE.x PnIFG.x PnIES.x
†
P1Sel.0
P1Sel.1
P1Sel.2
P1Sel.3
P1Sel.4
P1Sel.5
P1Sel.6
P1Sel.7
P1DIR.0
P1DIR.1
P1DIR.2
P1DIR.3
P1DIR.4
P1DIR.5
P1DIR.6
P1DIR.7
P1DIR.0
P1DIR.1
P1DIR.2
P1DIR.3
P1DIR.4
P1DIR.5
P1DIR.6
P1DIR.7
P1OUT.0
P1OUT.1
P1OUT.2
P1OUT.3
P1OUT.4
P1OUT.5
P1OUT.6
P1OUT.7
DV
P1IN.0
P1IN.1
P1IN.2
P1IN.3
P1IN.4
P1IN.5
P1IN.6
P1IN.7
TACLK
P1IE.0 P1IFG.0 P1IES.0
P1IE.1 P1IFG.1 P1IES.1
P1IE.2 P1IFG.2 P1IES.2
P1IE.3 P1IFG.3 P1IES.3
P1IE.4 P1IFG.4 P1IES.4
P1IE.5 P1IFG.5 P1IES.5
P1IE.6 P1IFG.6 P1IES.6
P1IE.7 P1IFG.7 P1IES.7
SS
†
†
†
†
†
†
Out0 signal
Out1 signal
Out2 signal
SMCLK
CCI0A
CCI1A
CCI2A
unused
unused
unused
unused
†
†
†
Out0 signal
Out1 signal
Out2 signal
†
Signal from or to Timer_A
40
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TI [ TEXAS INSTRUMENTS ]
