ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢄ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇ ꢃ ꢆ ꢈ ꢀ ꢁꢂꢃ ꢄꢅ ꢆꢇꢃ ꢆꢇ
ꢀ ꢉꢊꢋ ꢌ ꢁꢉ ꢍ ꢎꢏꢐ ꢀ ꢉꢑꢒꢓ ꢑꢓ ꢎꢔ ꢒꢓ ꢐꢐ ꢋꢒ
SLAS272F − JULY 2000 − REVISED JUNE 2004
APPLICATION INFORMATION
input/output schematic (continued)
port P4, P4.0 to P4.6, input/output with Schmitt-trigger
0: Input
1: Output
P4SEL.x
0
1
P4DIR.x
Direction Control
From Module
w
Module X IN
P5SEL.7
Pad Logic
P4.0/TB0 ..
P4.6/TB6
0
1
P4OUT.x
Module X OUT
TBOUTHiZ
Bus Keeper
P4IN.x
EN
D
Module X IN
x: bit identifier, 0 to 6 for Port P4
DIRECTION
CONTROL
PnSel.x
PnDIR.x
PnOUT.x
MODULE X OUT
PnIN.x
MODULE X IN
FROM MODULE
†
†
†
‡
P4Sel.0
P4Sel.1
P4Sel.2
P4DIR.0
P4DIR.1
P4DIR.2
P4DIR.0
P4DIR.1
P4DIR.2
P4OUT.0
P4OUT.1
P4OUT.2
Out0 signal
Out1 signal
Out2 signal
P4IN.0
P4IN.1
P4IN.2
CCI0A / CCI0B
CCI1A / CCI1B
CCI2A / CCI2B
‡
‡
†
†
†
†
‡
‡
‡
P4Sel.3
P4Sel.4
P4Sel.5
P4Sel.6
P4DIR.3
P4DIR.4
P4DIR.5
P4DIR.6
P4DIR.3
P4DIR.4
P4DIR.5
P4DIR.6
P4OUT.3
P4OUT.4
P4OUT.5
P4OUT.6
Out3 signal
Out4 signal
Out5 signal
Out6 signal
P4IN.3
P4IN.4
P4IN.5
P4IN.6
CCI3A / CCI3B
CCI4A / CCI4B
CCI5A / CCI5B
‡
CCI6A
†
‡
§
Signal from Timer_B
Signal to Timer_B
From P5.7
47
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TI [ TEXAS INSTRUMENTS ]
