MSP430F530x, MSP430F5310
SLAS677B –SEPTEMBER 2010–REVISED MARCH 2011
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TA1
TA1 is a 16-bit timer/counter (Timer_A type) with three capture/compare registers. It can support multiple
capture/compares, PWM outputs, and interval timing. It also has extensive interrupt capabilities. Interrupts may
be generated from the counter on overflow conditions and from each of the capture/compare registers.
Table 14. TA1 Signal Connections
INPUT PIN NUMBER
DEVICE
INPUT
SIGNAL
MODULE
INPUT
SIGNAL
MODULE
OUTPUT
SIGNAL
DEVICE
OUTPUT
SIGNAL
OUTPUT PIN NUMBER
MODULE
BLOCK
RGC/ZQE
RGZ, PT
RGC/ZQE
RGZ, PT
24/G5-P1.6
20-P1.6
TA1CLK
TACLK
ACLK
(internal)
ACLK
Timer
NA
NA
SMCLK
(internal)
SMCLK
24/G5-P1.6
25/H5-P1.7
20-P1.6
21-P1.7
TA1CLK
TA1.0
DVSS
TACLK
CCI0A
CCI0B
GND
25/H5-P1.7
26/J5-P2.0
21-P1.7
22-P2.0
CCR0
CCR1
TA0
TA1
TA1.0
TA1.1
DVSS
DVCC
VCC
26/J5-P2.0
27/G6-P2.1
22-P2.0
TA1.1
CCI1A
CBOUT
(internal)
CCI1B
DVSS
DVCC
TA1.2
GND
VCC
CCI2A
27/G6-P2.1
ACLK
(internal)
CCI2B
CCR2
TA2
TA1.2
DVSS
DVCC
GND
VCC
24
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