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MSP430FR5732IRGER 参数 Datasheet PDF下载

MSP430FR5732IRGER图片预览
型号: MSP430FR5732IRGER
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号微控制器 [MIXED SIGNAL MICROCONTROLLER]
分类和应用: 微控制器
文件页数/大小: 109 页 / 1238 K
品牌: TI [ TEXAS INSTRUMENTS ]
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MSP430FR573x  
MSP430FR572x  
SLAS639D JULY 2011REVISED AUGUST 2012  
www.ti.com  
DMA Controller  
The DMA controller allows movement of data from one memory address to another without CPU intervention. For  
example, the DMA controller can be used to move data from the ADC10_B conversion memory to RAM. Using  
the DMA controller can increase the throughput of peripheral modules. The DMA controller reduces system  
power consumption by allowing the CPU to remain in sleep mode, without having to awaken to move data to or  
from a peripheral.  
(1)  
Table 11. DMA Trigger Assignments  
TRIGGER  
0
CHANNEL 0  
DMAREQ  
CHANNEL 1  
DMAREQ  
CHANNEL 2  
DMAREQ  
1
TA0CCR0 CCIFG  
TA0CCR2 CCIFG  
TA1CCR0 CCIFG  
TA1CCR2 CCIFG  
Reserved  
TA0CCR0 CCIFG  
TA0CCR2 CCIFG  
TA1CCR0 CCIFG  
TA1CCR2 CCIFG  
Reserved  
TA0CCR0 CCIFG  
TA0CCR2 CCIFG  
TA1CCR0 CCIFG  
TA1CCR2 CCIFG  
Reserved  
2
3
4
5
6
Reserved  
Reserved  
Reserved  
7
TB0CCR0 CCIFG  
TB0CCR2 CCIFG  
TB0CCR0 CCIFG  
TB0CCR2 CCIFG  
TB0CCR0 CCIFG  
TB0CCR2 CCIFG  
8
(2)  
(2)  
(2)  
9
TB1CCR0 CCIFG  
TB1CCR2 CCIFG  
TB2CCR0 CCIFG  
TB2CCR2 CCIFG  
Reserved  
TB1CCR0 CCIFG  
TB1CCR2 CCIFG  
TB2CCR0 CCIFG  
TB2CCR2 CCIFG  
Reserved  
TB1CCR0 CCIFG  
TB1CCR2 CCIFG  
TB2CCR0 CCIFG  
TB2CCR2 CCIFG  
Reserved  
(2)  
(3)  
(3)  
(2)  
(3)  
(3)  
(2)  
(3)  
(3)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
UCA0RXIFG  
UCA0RXIFG  
UCA0RXIFG  
UCA0TXIFG  
UCA0TXIFG  
UCA0TXIFG  
(4)  
(4)  
(4)  
UCA1RXIFG  
UCA1RXIFG  
UCA1RXIFG  
(4)  
(4)  
(4)  
UCA1TXIFG  
UCA1TXIFG  
UCA1TXIFG  
UCB0RXIFG0  
UCB0TXIFG0  
UCB0RXIFG1  
UCB0TXIFG1  
UCB0RXIFG2  
UCB0TXIFG2  
UCB0RXIFG3  
UCB0TXIFG3  
UCB0RXIFG0  
UCB0TXIFG0  
UCB0RXIFG1  
UCB0TXIFG1  
UCB0RXIFG2  
UCB0TXIFG2  
UCB0RXIFG3  
UCB0TXIFG3  
UCB0RXIFG0  
UCB0TXIFG0  
UCB0RXIFG1  
UCB0TXIFG1  
UCB0RXIFG2  
UCB0TXIFG2  
UCB0RXIFG3  
UCB0TXIFG3  
(5)  
(5)  
(5)  
ADC10IFGx  
ADC10IFGx  
ADC10IFGx  
Reserved  
Reserved  
MPY ready  
DMA2IFG  
Reserved  
Reserved  
MPY ready  
DMA0IFG  
Reserved  
Reserved  
MPY ready  
DMA1IFG  
(6)  
(6)  
(6)  
DMAE0  
DMAE0  
DMAE0  
(1) If a reserved trigger source is selected, no trigger is generated.  
(2) Only on devices with TB1, otherwise reserved  
(3) Only on devices with TB2, otherwise reserved  
(4) Only on devices with eUSCI_A1, otherwise reserved  
(5) Only on devices with ADC, otherwise reserved  
(6) This function is not available on YFF package types.  
28  
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