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MSP430FR5732IRGER 参数 Datasheet PDF下载

MSP430FR5732IRGER图片预览
型号: MSP430FR5732IRGER
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号微控制器 [MIXED SIGNAL MICROCONTROLLER]
分类和应用: 微控制器
文件页数/大小: 109 页 / 1238 K
品牌: TI [ TEXAS INSTRUMENTS ]
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MSP430FR573x  
MSP430FR572x  
SLAS639D JULY 2011REVISED AUGUST 2012  
www.ti.com  
Bootstrap Loader (BSL)  
The BSL enables users to program the FRAM or RAM using a UART serial interface. Access to the device  
memory by the BSL is protected by an user-defined password. Use of the BSL requires four pins as shown in  
Table 7. BSL entry requires a specific entry sequence on the RST/NMI/SBWTDIO and TEST/SBWTCK pins. For  
complete description of the features of the BSL and its implementation, see the MSP430 Programming Via the  
Bootstrap Loader User's Guide (SLAU319).  
Table 7. BSL Pin Requirements and Functions  
DEVICE SIGNAL  
BSL FUNCTION  
Entry sequence signal  
Entry sequence signal  
Data transmit  
RST/NMI/SBWTDIO  
TEST/SBWTCK  
P2.0  
P2.1  
VCC  
VSS  
Data receive  
Power supply  
Ground supply  
JTAG Operation  
JTAG Standard Interface  
The MSP430 family supports the standard JTAG interface, which requires four signals for sending and receiving  
data. The JTAG signals are shared with general-purpose I/O. The TEST/SBWTCK pin is used to enable the  
JTAG signals. In addition to these signals, the RST/NMI/SBWTDIO is required to interface with MSP430  
development tools and device programmers. The JTAG pin requirements are shown in Table 8. For further  
details on interfacing to development tools and device programmers, see the MSP430 Hardware Tools User's  
Guide (SLAU278). For a complete description of the features of the JTAG interface and its implementation, see  
MSP430 Programming Via the JTAG Interface (SLAU320).  
Table 8. JTAG Pin Requirements and Functions  
DEVICE SIGNAL  
PJ.3/TCK  
DIRECTION  
FUNCTION  
JTAG clock input  
JTAG state control  
JTAG data input, TCLK input  
JTAG data output  
Enable JTAG pins  
External reset  
IN  
IN  
PJ.2/TMS  
PJ.1/TDI/TCLK  
PJ.0/TDO  
IN  
OUT  
IN  
TEST/SBWTCK  
RST/NMI/SBWTDIO  
VCC  
IN  
Power supply  
VSS  
Ground supply  
Spy-Bi-Wire Interface  
In addition to the standard JTAG interface, the MSP430 family supports the two-wire Spy-Bi-Wire interface. Spy-  
Bi-Wire can be used to interface with MSP430 development tools and device programmers. The Spy-Bi-Wire  
interface pin requirements are shown in Table 9. For further details on interfacing to development tools and  
device programmers, see the MSP430 Hardware Tools User's Guide (SLAU278). For a complete description of  
the features of the JTAG interface and its implementation, see MSP430 Programming Via the JTAG Interface  
(SLAU320).  
Table 9. Spy-Bi-Wire Pin Requirements and Functions  
DEVICE SIGNAL  
TEST/SBWTCK  
RST/NMI/SBWTDIO  
VCC  
DIRECTION  
IN  
FUNCTION  
Spy-Bi-Wire clock input  
Spy-Bi-Wire data input and output  
Power supply  
IN, OUT  
VSS  
Ground supply  
24  
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