HPC3130A
PCI HOT PLUG CONTROLLER
SCPS055 – NOVEMBER 1999
configuration and control registers (continued)
attention indicator control register
Bit
7
6
5
4
3
2
1
0
Name
Type
Default
Attention indicator control register
R
0
R
0
R
0
R
0
R/W
0
R/W
0
R/W
0
R/W
0
Register:
Type:
Attention indicator control
Read-only, Read/Write
Offset:
Default:
Description:
03 (slot 0), 0Bh (slot 1), 13h (slot 2), 1Bh (slot 3)
00h
This register controls the attention indicators. The timing for the indicators is based upon
the PCI clock and the M66EN input.
Table 11. Attention Indicator Control Register
BIT
7
TYPE
NAME
FUNCTION
Reserved. This bit returns 0 when read.
Reserved. This bit returns 0 when read.
Reserved. This bit returns 0 when read.
Reserved. This bit returns 0 when read.
R
R
R
R
RSVD
RSVD
RSVD
RSVD
6
5
4
Attention indicator 1 control. These bits control the state of ATTN1 per slot and are programmed as follows:
00 = Drive low
01 = Slow blink – 1 cycle per second
10 = Fast blink – 2 cycles per second
11 = Drive high
3–2
1–0
R/W
R/W
ATTN1_CTL
ATTN0_CTL
Attention indicator 0 control. These bits control the state of ATTN0 per slot and are programmed as follows:
00 = Drive low
01 = Slow blink – 1 cycle per second
10 = Fast blink – 2 cycles per second
11 = Drive high
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