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DP83840AVCE 参数 Datasheet PDF下载

DP83840AVCE图片预览
型号: DP83840AVCE
PDF下载: 下载PDF文件 查看货源
内容描述: 10/100 Mb / s的以太网物理层 [10/100 Mb/s Ethernet Physical Layer]
分类和应用: 电信集成电路电信电路信息通信管理以太网局域网(LAN)标准
文件页数/大小: 91 页 / 682 K
品牌: TI [ TEXAS INSTRUMENTS ]
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3.0 Functional Description (Continued)  
The Manchester encoder accepts NRZ data from the The decoder detects the end of a frame when no more  
controller or repeater, encodes the data to Manchester, mid-bit transitions are detected. Within one and a half bit  
and transmits it differentially to the transceiver, through the times after the last bit, carrier sense is de-asserted.  
differential transmit driver.  
Receive clock stays active for five more bit times after CRS  
goes low, to guarantee the receive timings of the controller  
or repeater.  
The Manchester decoder receives Manchester data from  
the transceiver, converts it to NRZ data and recovers clock  
pulses for synchronous data transfer to the controller or 3.7.14 REQ and RTX  
repeater.  
These pins allow for the direct control of both the pre-  
The collision monitor indicates to the controller the  
presence of a valid 10 MHz collision signal.  
emphasis (REQ) and the transmit amplitude (RTX) of the  
10BASE-T transmit signal. These pins should normally be  
left floating, however, in applications where lower transmit  
amplitudes are required, these pins should be pulled-down  
to ground resistively. Conversely, for applications that  
require higher transmit amplitudes, these pins should be  
pulled-up to Vcc resistively. Figure 16 provides a simplified  
functional diagram.  
3.7.13.1 Manchester Encoder and differential driver  
The encoder begins operation when the Transmit Enable  
input (TX_EN) goes high and converts the NRZ data to  
pre-emphasized Manchester data for the transceiver. For  
the duration of TXE remaining high, the Transmit Data  
(TXD) is encoded for the transmit-driver pair (TXU+/- or  
TXS+/-). TXD must be valid on the rising edge of Transmit  
Clock (TXC). Transmission ends when TX_EN deasserts.  
The last transition is always positive; it occurs at the center  
of the bit cell if the last bit is a one, or at the end of the bit  
cell if the last bit is a zero.  
Some experimentation is rorder to fully evaluate  
the extent of transmit amand orresponding pre-  
emphasis) variaon due to ystem system variations  
in external compnts (e.gansformers and termination  
networks). It is impont to use same resistor value for  
both RTX and REQ (lled to the same rail) in order to  
allow the prhasis to acthe transmit amplitude.  
3.7.13.2 Manchester Decoder  
The decoder consists of a differential receiver and a PLL to  
separate a Manchester encoded data stream into interna
clock signals and data. The differential input must be  
externally terminated with either a differential 100or  
differential 150termination network to accommodate  
either UTP or STP cable respectively. Refer to Figure 1
for further detail.  
In genera value of approximately 50Kfor these  
pins (elled-uor pulled-down) will result in a  
nsmit plitude nd pre-emphasis) change on the  
orr of % to 10%. Again, experimentation is  
recomended.  
Fixed  
Vcc  
Current  
Source  
R
Transmit  
Amplitude  
Control  
Fixed  
Current  
Source  
REQ  
Transmit  
Pre-emphasis  
Control  
R
R
GND  
FIGURE 16. REQ and RTX Operation  
Version A  
National Semiconductor  
32  
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