DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
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BUFFER
Table 3-11. Ball Characteristics (AAR Package) (continued)
BALL
RESET
REL.
PINCNTL
REGISTER NAME
AND ADDRESS[4]
PINCNTL
DEFAULT
VALUE[5]
BALL
RESET
STATE [9]
MODE
[6]
BALL NUMBER [1]
BALL NAME [2]
SIGNAL NAME [3]
TYPE [7] DSIS [8]
POWER [11]
HYS [12]
TYPE [13]
STATE [10]
F2
VOUT[1]_B_CB_C[3]
VOUT[1]_B_CB_C[3]
PINCNTL208 /
0x4814 0B3C
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x01
O
I
PIN
0
L
L
L
L
L
L
L
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
EMAC[1]_MRCLK
VIN[1]A_D[0]
0x02
0x04
0x80
0x01
0x02
0x04
0x80
0x01
0x02
0x04
0x80
0x01
0x02
0x04
0x80
0x01
0x02
0x04
0x80
0x01
0x02
0x04
0x20
0x80
0x01
0x02
0x04
0x20
0x80
0x01
0x02
0x04
0x80
I
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
1
GP3[0]
I/O
O
I
F3
VOUT[1]_B_CB_C[4]
VOUT[1]_B_CB_C[5]
VOUT[1]_B_CB_C[6]
VOUT[1]_B_CB_C[7]
VOUT[1]_B_CB_C[8]
VOUT[1]_B_CB_C[4]
EMAC[1]_MRXD[0]
VIN[1]A_D[1]
PINCNTL209 /
0x4814 0B40
L
L
L
L
L
I
GP3[1]
I/O
O
I
G1
G2
H3
G3
VOUT[1]_B_CB_C[5]
EMAC[1]_MRXD[1]
VIN[1]A_D[2]
PINCNTL210 /
0x4814 0B44
I
GP3[2]
I/O
O
I
VOUT[1]_B_CB_C[6]
EMAC[1]_MRXD[2]
VIN[1]A_D[3]
PINCNTL211 /
0x4814 0B48
I
GP3[3]
I/O
O
I
VOUT[1]_B_CB_C[7]
EMAC[1]_MRXD[3]
VIN[1]A_D[4]
PINCNTL212 /
0x4814 0B4C
I
GP3[4]
I/O
O
I
VOUT[1]_B_CB_C[8]
EMAC[1]_MRXD[4]
VIN[1]A_D[5]
PINCNTL213 /
0x4814 0B50
I
I2C[3]_SCL
I/O
I/O
O
I
GP3[5]
PIN
PIN
PIN
PIN
1
H5
D3
VOUT[1]_B_CB_C[9]
VOUT[1]_B_CB_C[9]
EMAC[1]_MRXD[5]
VIN[1]A_D[6]
PINCNTL214 /
0x4814 0B54
0x0004 0000
0x0004 0000
L
L
L
L
DVDD
DVDD
I
I2C[3]_SDA
I/O
I/O
O
I
GP3[6]
PIN
PIN
0
VOUT[1]_CLK
VOUT[1]_CLK
EMAC[1]_MTCLK
VIN[1]A_HSYNC
GP2[28]
PINCNTL204 /
0x4814 0B2C
I
0
I/O
PIN
58
Device Pins
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