DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
www.ti.com
BUFFER
Table 3-11. Ball Characteristics (AAR Package) (continued)
BALL
RESET
REL.
PINCNTL
REGISTER NAME
AND ADDRESS[4]
PINCNTL
DEFAULT
VALUE[5]
BALL
RESET
STATE [9]
MODE
[6]
BALL NUMBER [1]
BALL NAME [2]
SIGNAL NAME [3]
TYPE [7] DSIS [8]
POWER [11]
HYS [12]
TYPE [13]
STATE [10]
J9
VOUT[1]_G_Y_YC[7]
VOUT[1]_G_Y_YC[7]
PINCNTL219 /
0x4814 0B68
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
0x01
O
O
I
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
0
L
L
L
L
L
DVDD
DVDD
DVDD
DVDD
EMAC[1]_MTXD[0]
VIN[1]A_D[12]
GP3[11]
0x02
0x04
0x80
0x01
0x02
0x04
0x80
0x01
0x02
0x04
0x80
0x01
0x02
0x04
0x10
0x80
0x01
0x02
0x10
0x80
0x01
0x02
0x10
0x80
0x01
0x02
0x04
0x10
0x20
0x80
0x01
0x02
0x04
0x10
0x20
0x40
0x80
I/O
O
O
I
L3
K1
E2
VOUT[1]_G_Y_YC[8]
VOUT[1]_G_Y_YC[9]
VOUT[1]_HSYNC
VOUT[1]_G_Y_YC[8]
EMAC[1]_MTXD[1]
VIN[1]A_D[13]
GP3[12]
PINCNTL220 /
0x4814 0B6C
L
L
L
I/O
O
O
I
VOUT[1]_G_Y_YC[9]
EMAC[1]_MTXD[2]
VIN[1]A_D[14]
GP3[13]
PINCNTL221 /
0x4814 0B70
I/O
O
I
VOUT[1]_HSYNC
EMAC[1]_MCOL
VIN[1]A_VSYNC
SPI[3]_D[1]
PINCNTL205 /
0x4814 0B30
I
0
I/O
I/O
O
I
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
PIN
0
GP2[29]
C2
C1
L6
VOUT[1]_R_CR[0]
VOUT[1]_R_CR[1]
VOUT[1]_R_CR[2]
VOUT[1]_R_CR[0]
CAM_D[0]
PINCNTL171 /
0x4814 0AA8
0x0004 0000
0x0004 0000
0x0004 0000
L
L
L
L
L
L
DVDD_C
DVDD_C
DVDD
GPMC_A[8]
O
I/O
O
I
GP0[25]
VOUT[1]_R_CR[1]
CAM_D[1]
PINCNTL170 /
0x4814 0AA4
GPMC_A[7]
O
I/O
O
O
I
GP0[24]
VOUT[1]_R_CR[2]
GPMC_A[15]
VIN[1]A_D[23]
HDMI_HPDET
SPI[2]_D[1]
PINCNTL230 /
0x4814 0B94
I
I/O
I/O
O
O
I
PIN
PIN
PIN
PIN
PIN
1
GP3[22]
L4
VOUT[1]_R_CR[3]
VOUT[1]_R_CR[3]
GPMC_A[14]
VIN[1]A_D[22]
HDMI_SDA
PINCNTL229 /
0x4814 0B90
0x0006 0000
H
H
DVDD
I/O
I/O
I/O
I/O
SPI[2]_SCLK
I2C[2]_SDA
1
1
GP3[21]
PIN
60
Device Pins
Copyright © 2013, Texas Instruments Incorporated
Submit Documentation Feedback
Product Folder Links: DM385 DM388
TI [ TEXAS INSTRUMENTS ]
