DM385, DM388
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SPRS821D –MARCH 2013–REVISED DECEMBER 2013
Table 3-11. Ball Characteristics (AAR Package) (continued)
BALL
RESET
REL.
PINCNTL
REGISTER NAME
AND ADDRESS[4]
PINCNTL
DEFAULT
VALUE[5]
BALL
RESET
STATE [9]
MODE
[6]
BUFFER
TYPE [13]
BALL NUMBER [1]
BALL NAME [2]
SIGNAL NAME [3]
TYPE [7] DSIS [8]
POWER [11]
HYS [12]
STATE [10]
A14
B13
A12
B14
B12
A11
T27
T24
D2
HDMI_DN0
HDMI_DN0
HDMI_DN1
HDMI_DN2
HDMI_DP0
HDMI_DP1
HDMI_DP2
I2C[0]_SCL
NA /
NA
NA
NA
NA
NA
NA
NA
0x01
O
NA
NA
NA
NA
NA
NA
PIN
PIN
NA
NA
NA
NA
NA
NA
H
NA
NA
NA
NA
NA
NA
H
VDDA_HDMI_1P8
VDDA_HDMI_1P8
VDDA_HDMI_1P8
VDDA_HDMI_1P8
VDDA_HDMI_1P8
VDDA_HDMI_1P8
DVDD
HDMI_DN1
HDMI_DN2
HDMI_DP0
HDMI_DP1
HDMI_DP2
I2C[0]_SCL
I2C[0]_SDA
I2C[1]_SCL
NA /
NA
0x01
0x01
0x01
0x01
0x01
0x01
0x01
O
NA /
NA
O
NA /
NA
O
NA /
NA
O
NA /
NA
O
PINCNTL263 /
0x4814 0C18
0x000C 0000
0x000C 0000
0x000E 0000
I/O
I/O
I2C[0]_SDA
PINCNTL264 /
0x4814 0C1C
H
H
DVDD
I2C[1]_SCL
HDMI_SCL
I2C[1]_SDA
HDMI_SDA
LDOCAP_ARM
PINCNTL78 /
0x4814 0934
0x01
0x02
0x01
0x02
NA
I/O
I/O
I/O
I/O
A
1
H
H
DVDD
1
D1
I2C[1]_SDA
PINCNTL79 /
0x4814 0938
0x000E 0000
1
H
H
DVDD
1
J19
LDOCAP_ARM
NA /
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
NA
L
NA
NA
NA
NA
NA
NA
NA
NA
L
NA
K20
LDOCAP_ARMRAM
LDOCAP_HDVICP
LDOCAP_HDVICPRAM
LDOCAP_RAM0
LDOCAP_RAM1
LDOCAP_RAM2
LDOCAP_SERDESCLK
MCA[0]_ACLKR
MCA[0]_ACLKX
LDOCAP_ARMRAM
LDOCAP_HDVICP
LDOCAP_HDVICPRAM
LDOCAP_RAM0
LDOCAP_RAM1
LDOCAP_RAM2
LDOCAP_SERDESCLK
MCA[0]_ACLKR
NA /
NA
NA
NA
A
NA
NA
NA
NA
NA
NA
NA
0
NA
W23
Y24
NA /
NA
NA
NA
A
NA
NA /
NA
NA
NA
A
NA
U9
NA /
NA
NA
NA
A
NA
T22
NA /
NA
NA
NA
A
NA
AB10
M24
AD30
AD28
AF30
AE29
AF29
NA /
NA
NA
NA
A
NA
NA /
NA
NA
NA
A
NA
PINCNTL19 /
0x4814 0848
0x0004 0000
0x0004 0000
0x000C 0000
0x000C 0000
0x000C 0000
0x01
0x01
0x01
0x01
0x01
I/O
I/O
I/O
I/O
I/O
DVDD
DVDD
DVDD
DVDD
DVDD
MCA[0]_ACLKX
PINCNTL17 /
0x4814 0840
PIN
0
L
L
MCA[0]_AFSR
MCA[0]_AFSR
PINCNTL20 /
0x4814 084C
L
L
MCA[0]_AFSX
MCA[0]_AFSX
PINCNTL18 /
0x4814 0844
PIN
PIN
L
L
MCA[0]_AXR[0]
MCA[0]_AXR[0]
PINCNTL21 /
0x4814 0850
L
L
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