DM385, DM388
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SPRS821D –MARCH 2013–REVISED DECEMBER 2013
Table 3-11. Ball Characteristics (AAR Package) (continued)
BALL
RESET
REL.
PINCNTL
REGISTER NAME
AND ADDRESS[4]
PINCNTL
DEFAULT
VALUE[5]
BALL
RESET
STATE [9]
MODE
[6]
BUFFER
TYPE [13]
BALL NUMBER [1]
BALL NAME [2]
SIGNAL NAME [3]
TYPE [7] DSIS [8]
POWER [11]
HYS [12]
STATE [10]
AE4
EMAC[0]_MTXD[3]/
EMAC[1]_RGTXD[0]
EMAC[0]_MTXD[3]/
PINCNTL253 /
0x4814 0BF0
0x0004 0000
0x0004 0000
0x0004 0000
0x01
I/O
PIN
L
L
L
L
DVDD_RGMII
EMAC[1]_RGTXD[0]
EMAC[1]_RMRXD[1]
GPMC_A[10]
0x02
0x10
0x01
I
PIN
PIN
PIN
O
I/O
AK8
AJ8
EMAC[0]_MTXD[4]/
EMAC[1]_RGTXD[2]
EMAC[0]_MTXD[4]/
EMAC[1]_RGTXD[2]
PINCNTL254 /
0x4814 0BF4
L
L
DVDD_RGMII
DVDD_RGMII
EMAC[1]_RMRXER
GPMC_A[11]
0x02
0x10
0x01
I
0
O
I/O
PIN
PIN
EMAC[0]_MTXD[5]/
EMAC[1]_RGTXC
EMAC[0]_MTXD[5]/
EMAC[1]_RGTXC
PINCNTL255 /
0x4814 0BF8
EMAC[1]_RMCRSDV
GPMC_A[12]
0x02
0x10
0x20
0x01
I
0
O
I
PIN
1
UART1_RXD
AH8
AG8
AF8
AG1
EMAC[0]_MTXD[6]/
EMAC[1]_RGRXD[0]
EMAC[0]_MTXD[6]/
EMAC[1]_RGRXD[0]
PINCNTL256 /
0x4814 0BFC
0x0004 0000
0x0004 0000
0x0004 0000
0x0004 0000
I/O
PIN
L
L
L
L
L
L
L
L
DVDD_RGMII
DVDD_RGMII
DVDD_RGMII
DVDD_RGMII
EMAC[1]_RMTXD[0]
GPMC_A[13]
0x02
0x10
0x20
0x01
O
PIN
PIN
PIN
PIN
O
UART1_TXD
O
EMAC[0]_MTXD[7]/
EMAC[1]_RGTXD[3]
EMAC[0]_MTXD[7]/
EMAC[1]_RGTXD[3]
PINCNTL257 /
0x4814 0C00
I/O
EMAC[1]_RMTXD[1]
GPMC_A[14]
0x02
0x10
0x20
0x01
O
PIN
PIN
1
O
UART1_CTS
I/O
I/O
EMAC[0]_MTXEN/
EMAC[1]_RGRXD[2]
EMAC[0]_MTXEN/
EMAC[1]_RGRXD[2]
PINCNTL258 /
0x4814 0C04
PIN
EMAC[1]_RMTXEN
GPMC_A[15]
UART1_RTS
EMAC_RMREFCLK
TIM2_IO
0x02
0x10
0x20
0x01
0x40
0x80
0x01
O
PIN
PIN
PIN
PIN
PIN
PIN
NA
O
O
EMAC_RMREFCLK
PINCNTL232 /
0x4814 0B9C
I/O
I/O
I/O
I/O
GP1[10]
A18
B19
M1
EMU0
EMU0
NA /
NA
NA
H
H
L
H
H
L
DVDD
EMU1
EMU1
NA /
NA
NA
0x01
I/O
NA
DVDD
GPMC_A[16]
GPMC_A[16]
GP2[5]
PINCNTL105 /
0x4814 09A0
0x0004 0000
0x01
0x80
0x01
0x80
O
PIN
PIN
PIN
PIN
DVDD_GPMC
I/O
O
M2
GPMC_A[17]
GPMC_A[17]
GP2[6]
PINCNTL106 /
0x4814 09A4
0x0004 0000
L
L
DVDD_GPMC
I/O
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