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DM385 参数 Datasheet PDF下载

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型号: DM385
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内容描述: DM385和DM388 DaVincia ? ¢数字媒体处理器 [DM385 and DM388 DaVinci™ Digital Media Processor]
分类和应用:
文件页数/大小: 280 页 / 2479 K
品牌: TI [ TEXAS INSTRUMENTS ]
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DM385, DM388  
www.ti.com  
SPRS821D MARCH 2013REVISED DECEMBER 2013  
8.6.3 Management Data Input/Output (MDIO)  
The Management Data Input/Output (MDIO) module continuously polls all 32 MDIO addresses in order to  
enumerate all PHY devices in the system.  
The MDIO module implements the 802.3 serial management interface to interrogate and control Ethernet  
PHYs using a shared two-wire bus. Host software uses the MDIO module to configure the auto-  
negotiation parameters of each PHY attached to the EMAC SW, retrieve the negotiation results, and  
configure required parameters in the EMAC SW module for correct operation. The module is designed to  
allow almost transparent operation of the MDIO interface, with very little maintenance from the core  
processor. A single MDIO interface is pinned out to control the PHY configuration and status monitoring.  
Multiple external PHYs can be controlled by the MDIO interface.  
For more detailed information on the MDIO peripheral, see the 3PSW Ethernet Subsystem chapter in the  
device-specific Technical Reference Manual.  
8.6.3.1 MDIO Peripheral Register Descriptions  
The MDIO peripheral registers are described in the device-specific Technical Reference Manual. Each  
register is documented as an offset from a base address for the peripheral. The base addresses for all of  
the peripherals are in the device memory map (see Section 2.10).  
8.6.3.2 MDIO Electrical Data/Timing  
Table 8-23. Timing Requirements for MDIO Input  
(see Figure 8-18)  
OPP100/OPP120/  
Turbo/Nitro  
NO.  
UNIT  
MIN  
400  
180  
15  
MAX  
1
tc(MDCLK)  
Cycle time, MDCLK  
ns  
ns  
ns  
ns  
tw(MDCLK)  
Pulse duration, MDCLK high or low  
4
5
tsu(MDIO-MDCLKH)  
th(MDCLKH-MDIO)  
Setup time, MDIO data input valid before MDCLK high  
Hold time, MDIO data input valid after MDCLK high  
10  
1
MDCLK  
4
5
MDIO  
(input)  
Figure 8-18. MDIO Input Timing  
Table 8-24. Switching Characteristics Over Recommended Operating Conditions for MDIO Output  
(see Figure 8-19)  
OPP100/OPP120/  
Turbo/Nitro  
NO.  
PARAMETER  
UNIT  
MIN  
MAX  
100  
7
td(MDCLKL-MDIO)  
Delay time, MDCLK low to MDIO data output valid  
ns  
Copyright © 2013, Texas Instruments Incorporated  
Peripheral Information and Timings  
179  
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Product Folder Links: DM385 DM388  
 
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