DM385, DM388
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SPRS821D –MARCH 2013–REVISED DECEMBER 2013
8.6.2.2 EMAC RMII Electrical Data/Timing
Table 8-16. Timing Requirements for EMAC[x]_RMREFCLK - RMII Operation
(see Figure 8-13)
OPP100/OPP120/Turbo/Nitro
UNIT
NO.
MIN
MAX
20.001
13
1
2
3
4
tc(RMREFCLK)
Cycle time, EMAC[x]_RMREFCLK
19.999
ns
ns
ns
ns
tw(RMREFCLKH)
tw(RMREFCLKL)
tt(RMREFCLK)
Pulse duration, EMAC[x]_RMREFCLK high
Pulse duration, EMAC[x]_RMREFCLK low
Transition time, EMAC[x]_RMREFCLK
7
7
13
3
1
2
4
RMREFCLK
(Input)
3
4
Figure 8-13. RMREFCLK Timing RMII Operation
Table 8-17. Timing Requirements for EMAC RMII Receive
(see Figure 8-13)
OPP100/OPP120/
Turbo/Nitro
NO.
UNIT
MIN
MAX
tsu(RMRXD-RMREFCLK)
Setup time, receive selected signals valid before
EMAC[x]_RMREFCLK
1
2
tsu(RMCRSDV-RMREFCLK)
tsu(RMRXER-RMREFCLK)
th(RMREFCLK-RMRXD)
th(RMREFCLK-RMCRSDV)
th(RMREFCLK-RMRXER)
4
ns
ns
Hold time, receive selected signals valid after
EMAC[x]_RMREFCLK
2
1
2
RMREFCLK
RMRXD1−RMRXD0,
RMCRSDV, RMRXER (inputs)
Figure 8-14. EMAC Receive Interface Timing RMII Operation
Copyright © 2013, Texas Instruments Incorporated
Peripheral Information and Timings
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