DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
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Table 8-13. Timing Requirements for EMAC [G]MII Receive 10/100/1000 Mbit/s
(see Figure 8-11)
OPP100/OPP120/Turbo/Nitro
1000 Mbps (1
Gbps)
100/10 Mbps
NO.
UNIT
MIN
MAX
MIN
MAX
tsu(MRXD-MRCLK)
Setup time, receive selected signals valid before
EMAC[1:0]_MRCLK
1
2
tsu(MRXDV-MRCLK)
tsu(MRXER-MRCLK)
th(MRCLK-MRXD)
th(MRCLK-MRXDV)
th(MRCLK-MRXER)
3.14
8
ns
ns
Hold time, receive selected signals valid after
EMAC[1:0]_MRCLK
1.09
8
1
2
EMAC[x]_MRCLK (Input)
EMAC[x]_MRXD3−EMAC[x]_MRXD0,
EMAC[x]_MRXDV, EMAC[x]_MRXER (Inputs)
Figure 8-11. EMAC Receive Interface Timing [G]MII Operation
Table 8-14. Switching Characteristics Over Recommended Operating Conditions for EMAC [G]MII
Transmit 10/100 Mbits/s
(see Figure 8-12)
OPP100/OPP120/
Turbo/Nitro
NO.
PARAMETER
UNIT
100/10 Mbps
MIN
MAX
25
td(MTXCLK-MTXD)
td(MTCLK-MTXEN)
1
Delay time, EMAC[x]_MTCLK to transmit selected signals valid
0
ns
Table 8-15. Switching Characteristics Over Recommended Operating Conditions for EMAC [G]MII
Transmit 1000 Mbits/s
(see Figure 8-12)
OPP100/OPP120/
Turbo/Nitro
NO.
PARAMETER
UNIT
1000 Mbps (1 Gbps)
MIN
MAX
td(GMTCLK-MTXD)
1
Delay time, EMAC[x]_GMTCLK to transmit selected signals valid
0.5
5
ns
td(GMTCLK-MTXEN)
1
EMAC[x]_MTCLK (Input)
EMAC[x]_MTXD3−EMAC[x]_MTXD0,
EMAC[x]_MTXEN (Outputs)
Figure 8-12. EMAC Transmit Interface Timing [G]MII Operation
174
Peripheral Information and Timings
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