DM385, DM388
SPRS821D –MARCH 2013–REVISED DECEMBER 2013
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6.2 Recommended Operating Conditions
PARAMETER
OPP_Nitro
MIN
NOM
MAX UNIT
1.28
1.35
1.42
Supply voltage, Core (Scalable) OPP_Turbo
DVFS only, No AVS
1.28
1.35
1.42
V
CVDD
120% OPP
100% OPP(1)
OPP_Nitro
OPP_Turbo
1.14
1.05
1.28
1.20
1.10
1.35
1.26
1.16
1.42
Supply voltage, Core ARM
(Scalable)
1.28
1.35
1.42
V
CVDD_ARM
120% OPP
100% OPP(1)
OPP_Nitro
1.14
1.05
1.28
1.20
1.10
1.35
1.26
1.16
1.42
Supply voltage, Core, HDVICP2 OPP_Turbo
CVDD_HDVICP (Scalable)
1.28
1.35
1.42
V
120% OPP
100% OPP(1)
3.3 V
1.14
1.05
3.14
1.71
3.14
1.71
3.14
1.71
3.14
1.71
3.14
1.71
1.71
1.43
1.28
1.20
1.10
3.3
1.8
3.3
1.8
3.3
1.8
3.3
1.8
3.3
1.8
1.8
1.5
1.35
1.26
1.16
Supply voltage, I/O, standard
3.47
V
pins(2)
DVDD
1.8 V
1.89
Supply voltage, I/O, GPMC pin
group
3.3 V
3.47
V
DVDD_GPMC
DVDD_RGMII
DVDD_SD
DVDD_C
1.8 V
1.89
Supply voltage, I/O, RGMII pin
group
3.3 V
3.47
V
1.8 V
1.89
Supply voltage, I/O, SD pin
group
3.3 V
3.47
V
1.8 V
1.89
Supply voltage, I/O, C pin group 3.3 V
1.8 V
3.47
V
1.89
Supply voltage, I/O, DDR[0]
DDR2
DDR3
DDR3L
1.89
DVDD_DDR[0]
1.58
1.42
V
V
VDDA_USB_3P Supply voltage, I/O, Analog, USB 3.3 V
3
3.14
3.3
1.8
1.1
3.47
1.89
Supply Voltage, I/O, Analog, (VDDA_1P8,
VDDA_ARMPLL_1P8, VDDA_VIDPLL_1P8,
VDDA_AUDIOPLL_1P8, VDDA_DDRPLL_1P8,
VDDA_L3L4PLL_1P8, VDDA_PCIE_1P8,
VDDA_HDMI_1P8, VDDA_USB0_1P8, VDDA_USB1_1P8,
VDDA_VDAC_1P8, VDDA_CSI2_1P8,
VDDA_HDDACREF_1P8, VDDA_HDDAC_1P8,
VDDA_HDVICPPLL_1P8, VDDS_OSC0_1P8,
VDDS_OSC1_1P8)
VDDA_1P8
VDDA_x_1P8
VDDS_x_1P8
1.71
V
Note: HDMI, USB0/1, and VDAC relative to their
respective VSSA.
VDDA_HDDAC Supply voltage, I/O, Analog, HD-DAC 1.1 V
_1P1
1.05
1.15
V
V
Supply Ground (VSS, VSSA_HDMI, VSSA_USB,
VSS
0
VSSA_VDAC, VSSA_DEVOSC(3), VSSA_AUXOSC(3)
)
IO Reference Voltage, (VREFSSTL_DDR[0])
VREFSSTL_DDR[0]
0.49 *
0.50 *
0.51 *
V
V
DVDD_DDR[0] DVDD_DDR[0] DVDD_DDR[0]
USBx_VBUSIN USBx VBUS Comparator Input
4.75 5.25
5
(1) OPP100 is currently supported only on DM388 commercial temperature devices.
(2) LVCMOS pins are all I/O pins powered by DVDD, DVDD_GPMC, DVDD_RGMII, DVDD_SD, DVDD_C supplies except for I2C[0] and
I2C[1] pins.
(3) When using the internal Oscillators, the oscillator grounds (VSSA_DEVOSC, VSSA_AUXOSC) must be kept separate from other
grounds and connected directly to the crystal load capacitor ground.
124
Device Operating Conditions
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