bq24707
bq24707A
SLUSA78B –JULY 2010–REVISED MARCH 2011
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FUNCTIONAL BLOCK DIAGRAM
3.75V
UVLO
bq24707 and bq24707A Block Diagram
** Threshold or deglitch time is adjustable by ChargeOption()
VCC 20
EN_REGN
WAKEUP
6
ACDET
0.6V
ACGOOD
WATCHDOG
TIMER
175s **
VCC_SRN
2.4V
ACOK
5
EN_CHRG
IFAULT
WATCHDOG
TIMEOUT
ACOK_DRV
VREF_IAC
1.3s rising deglitch** (bq24707)
1.2ms rising deglitch** (bq24707A)
11 IFAULT
ACP
ACN
2
1
20X
Type III
Compensation
ACOK_DRV
1X
IOUT
7
MUX
FBO
EAI
CHARGE_INHIBIT
17 BTST
18 HIDRV
IOUT_SEL
DAC_VALID
HSON
ILIM 10
EAO
PWM
13
SRP
20X
SRN 12
19 PHASE
16 REGN
VREF_ICHG
RAMP
Frequency **
EN_REGN
LSON
REGN
LDO
200mV
VFB
ILIM
CE
15 LODRV
14 GND
105mV
VREF_VREG
10uA
4mA in
BATOVP
Tj
TSHUT
WAKEUP
155?C
Driver Logic
SRP-SRN
CHG_OCP
DAC_VALID
60mV/90mV/120mV
SMBus Interface
CHARGE_INHIBIT
VREF_VREG
SDA
SCL
8
9
ChargeOption()
ChargeCurrent()
ChargeVoltage()
InputCurrent()
ManufactureID()
DeviceID()
5mV
CHG_UCP
SRP-SRN
VREF_ICHG
VREF_IAC
IOUT_SEL
LIGHT_LOAD
1.25mV
SRP-SRN
ACP-PH
IFAULT_HI
IFAULT_LO
CMPOUT
3
700mV **
CMPOUT_DRV
PH-GND
110mV
0.6V **
50kΩ
ACP-ACN
CMPIN
4
ACOC
1.66xVREF_IAC **
ACP-ACN
2000kΩ
FAST_DPM
1.08xVREF_IAC
4.3V
REFRESH
BTST-PH
VFB
BATOVP
104%VREF_VREG
BAT_LOWV
2.5V
SRN
VCC
VCC-SRN
SRN+245mV
Figure 15. Functional Block Diagram for bq24707 and bq24707A
12
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