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AM3352BZCZD80 参数 Datasheet PDF下载

AM3352BZCZD80图片预览
型号: AM3352BZCZD80
PDF下载: 下载PDF文件 查看货源
内容描述: 的Sitara AM335x ARM Cortex-A8的微处理器(MPU ) [Sitara AM335x ARM Cortex-A8 Microprocessors (MPUs)]
分类和应用: 微控制器和处理器外围集成电路微处理器时钟
文件页数/大小: 236 页 / 2887 K
品牌: TI [ TEXAS INSTRUMENTS ]
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AM3359, AM3358, AM3357  
AM3356, AM3354, AM3352  
SPRS717F OCTOBER 2011REVISED APRIL 2013  
www.ti.com  
5.10 Multichannel Audio Serial Port (McASP)  
The multichannel audio serial port (McASP) functions as a general-purpose audio serial port optimized for  
the needs of multichannel audio applications. The McASP is useful for time-division multiplexed (TDM)  
stream, Inter-Integrated Sound (I2S) protocols, and inter-component digital audio interface transmission  
(DIT).  
5.10.1 McASP Device-Specific Information  
The device includes two multichannel audio serial port (McASP) interface peripherals (McASP0 and  
McASP1). The McASP module consists of a transmit and receive section. These sections can operate  
completely independently with different data formats, separate master clocks, bit clocks, and frame syncs  
or, alternatively, the transmit and receive sections may be synchronized. The McASP module also  
includes shift registers that may be configured to operate as either transmit data or receive data.  
The transmit section of the McASP can transmit data in either a time-division-multiplexed (TDM)  
synchronous serial format or in a digital audio interface (DIT) format where the bit stream is encoded for  
SPDIF, AES-3, IEC-60958, CP-430 transmission. The receive section of the McASP peripheral supports  
the TDM synchronous serial format.  
The McASP module can support one transmit data format (either a TDM format or DIT format) and one  
receive format at a time. All transmit shift registers use the same format and all receive shift registers use  
the same format; however, the transmit and receive formats need not be the same. Both the transmit and  
receive sections of the McASP also support burst mode, which is useful for non-audio data (for example,  
passing control information between two devices).  
The McASP peripheral has additional capability for flexible clock generation and error detection/handling,  
as well as error management.  
The device McASP0 and McASP1 modules have up to four serial data pins each. The McASP FIFO size  
is 256 bytes and two DMA and two interrupt requests are supported. Buffers are used transparently to  
better manage DMA, which can be leveraged to manage data flow more efficiently.  
For more detailed information on and the functionality of the McASP peripheral, see the Multichannel  
Audio Serial Port (McASP) section of the AM335x ARM Cortex-A8 Microprocessors (MPUs) Technical  
Reference Manual (literature number SPRUH73).  
208  
Peripheral Information and Timings  
Copyright © 2011–2013, Texas Instruments Incorporated  
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Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352  
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