ADS131B04-Q1
ZHCSMK3B –NOVEMBER 2020 –REVISED NOVEMBER 2021
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8.6.8 RESERVED Register (Address = 07h) [reset = 0000h]
The RESERVED register is shown in 图8-33 and described in 表8-20.
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图8-33. RESERVED Register
15
14
13
12
11
10
2
9
1
8
0
RESERVED
R/W-00000000b
7
6
5
4
3
RESERVED
R/W-00000000b
表8-20. RESERVED Register Field Descriptions
Bit
15:0
Field
RESERVED
Type
Reset
Description
R/W
00000000
Reserved
00000000b Always write 0000000000000000b
8.6.9 RESERVED Register (Address = 08h) [reset = 0000h]
The RESERVED register is shown in 图8-34 and described in 表8-21.
Return to the Summary Table.
图8-34. RESERVED Register
15
14
13
12
11
10
2
9
1
8
0
RESERVED
R/W-00000000b
7
6
5
4
3
RESERVED
R-0000b
RESERVED
R/W-0000b
表8-21. RESERVED Register Field Descriptions
Bit
Field
Type
Reset
00000000b Reserved
Always write 00000000b
Reserved
Description
15:8
RESERVED
RESERVED
RESERVED
R/W
7:4
R
0000b
0000b
Always reads 0000b
3:0
R/W
Reserved
Always write 0000b
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